144results about How to "Increase channel width" patented technology

It is an object to provide a liquid crystal display device and an electronic device of which aperture ratio increases. The present invention includes a substrate having an insulating surface, a transistor formed over the substrate, a pixel electrode electrically connected to the transistor. The transistor includes a gate electrode, a gate insulating layer over the gate electrode, a semiconductor layer having a microcrystalline structure over the gate insulating layer, and a buffer layer over the semiconductor layer having the microcrystalline structure. The channel width W of the transistor and the channel length L of the transistor satisfy a relation of 0.1≦W / L≦1.7.

A semiconductor power device supported on a semiconductor substrate that includes a plurality of transistor cells, each cell has a source and a drain region disposed on opposite sides of a gate region in the semiconductor substrate. A gate electrode is formed as an electrode layer on top of the gate region for controlling an electric current transmitted between the source and the drain regions. The gate electrode layer disposed on top of the semiconductor substrate is patterned into a wave-like shaped stripes for substantially increasing an electric current conduction area between the source and drain regions across the gate.

Transistor bodies of semiconductor material located at a main surface of a semiconductor substrate between shallow trench isolations are provided with a rounded or curved upper surface. A floating gate electrode is arranged above said upper surface and electrically insulated from the semiconductor material by a tunnel dielectric having essentially the same tiny thickness throughout a primary tunnel area encompassing the area of curvature. The floating gate electrode may bridge the transistor body and is covered with a coupling dielectric provided for a control gate electrode, which forms part of a wordline.

The invention discloses a semiconductor device comprising a junction type field effect transistor and a manufacturing method thereof. The semiconductor device comprises a junction type field effect transistor, wherein the junction type field effect transistor comprises a semiconductor underlay, an epitaxial layer, a body region, a source electrode region and a grid region, wherein the semiconductor underlay is provided with a first doping type and taken as a drain region of the junction type field effect transistor; the epitaxial layer is located on the semiconductor underlay and provided with a first doping type; the body region is located in the epitaxial layer and provided with a second doping type, and the types of the second doping type and the first doping type are reverse; the source electrode is located in the epitaxial layer and provided with a first doping type; and the grid region is located in the body region and provided with the second doping type, wherein the junction type field effect transistor further comprises a shielding layer, the shielding layer is provided with the second doping type, which is located in the epitaxial layer, and is also located in a conduction path between the source electrode region and the drain region. With the adoption of the shielding layer, a new pinch-off region is generated in the junction type field effect transistor, so as to reduce pinch-off voltage.