69 results about "Metal-induced crystallization" patented technology

The present invention provides for a low-temperature method to crystallize a silicon-germanium film. Metal-induced crystallization of a deposited silicon film can serve to reduce the temperature required to crystallize the film. Increasing germanium content in a silicon-germanium alloy further decreases crystallization temperature. By using metal-induced crystallization to crystallize a deposited silicon-germanium film, temperature can be reduced substantially. In preferred embodiments, for example in a monolithic three dimensional array of stacked memory levels, reduced temperature allows the use of aluminum metallization. In some embodiments, use of metal-induced crystallization in a vertically oriented silicon-germanium diode having conductive contacts at the top and bottom end is be particularly advantageous, as increased solubility of the metal catalyst in the contact material will reduce the risk of metal contamination of the diode.

A method of manufacturing a thin film transistor that provides high electric field mobility is disclosed. The method comprising: a) forming an amorphous silicon layer and a blocking layer on an insulating substrate; b) forming a photoresist layer having first and second photoresist patterns on the blocking layer, the first and second photoresist patterns spaced apart from each other; c) etching the blocking layer using the first photoresist pattern as a mask to form first and second blocking patterns; d) reflowing the photoresist layer, so that the first and second photoresist patterns abut on each other to entirely cover the first and second blocking patterns; e) forming a metal layer over the entire surface of the insulating substrate; f) removing the photoresist layer to expose the blocking layer and an offset region between the blocking layer and the metal layer; g) crystallizing the amorphous silicon layer to form a poly silicon layer, wherein a portion of the amorphous silicon layer directly contacting the first metal layer is crystallized through a metal induced crystallization (MIC), and the remaining portion of the amorphous silicon layer is crystallized through a metal induced lateral crystallization (MILC), so that a MILC front exists on a portion of the poly silicon layer between the first and second blocking patterns; h) etching the poly silicon layer using the first and second blocking patterns as a mask to form first and second semiconductor layers and to remove the MILC front; and i) removing the first and second blocking patterns.

A method of forming a crystalline silicon layer on a microrough face of a substrate by reducing the microroughness of the face and then performing a metal induced crystallization process on the face is disclosed. The method further comprises, after metal induced crystallization and before removing the metal layer, removing silicon islands using the metal layer as a mask.

Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystallization inducing metal layer below a buffer layer and diffusing the crystallization inducing metal layer. The thin film transistor may include a crystallization inducing metal layer formed on an insulating substrate, a buffer layer formed on the crystallization inducing metal layer, and an active layer formed on the buffer layer and including source / drain regions, and including polycrystalline silicon crystallized by the MIC process.

A method of forming a crystalline silicon layer on a microrough face of a substrate by reducing the microroughness of the face and then performing a metal induced crystallization process on the face is disclosed.

The invention provides a coiling-type germanium nanomaterial and a preparation method thereof. The coiling-type germanium nanomaterial can be used as a negative electrode of a lithium ion battery. According to the preparation method, a metal layer prepared by adopting an ionic liquid electroposition method and a germanium layer are combined, and the coiling-type germanium nanomaterial is prepared by combining with a metal induced crystallization theory. The coiling-type germanium nanomaterial provided by the invention can be used as the negative electrode of the lithium ion battery, so that volume expansion of the germanium-based material can be effectively slowed down; the coiling-type germanium nanomaterial can be used for preparing the lithium ion power battery with high capacity, large multiplying power and long service life.

The present invention provides a method and apparatus for fabricating piezoresistive polysilicon on a substrate by low-temperature metal induced crystallization by: (1) providing the substrate having a passivation layer; (2) performing, at or near room temperature in a chamber without breaking a vacuum or near-vacuum within the chamber, the steps of: (a) creating a metal layer on the passivation layer, and (b) creating an amorphous silicon layer on the metal layer, wherein the metal layer and the amorphous silicon layer have approximately the same thickness; (3) annealing the substrate, the passivation layer, the metal layer and the amorphous silicon layer at a temperature equal to or less than 600° C. and a period of time equal to or less than three hours to form a doped polysilicon layer below a residual metal layer; and (4) removing the residual metal layer to expose the doped polysilicon layer.

Provided is a method of manufacturing a driving-device for a unit pixel of an organic light emitting display having an improved manufacturing process in which the driving device can be manufactured with a smaller number of processes and in simpler processes. The method includes: forming an amorphous silicon layer including a first amorphous region and a second amorphous region disposed on the same plane of a substrate; forming an SAM (self-assembled monolayer) having a hydrophobic property on the first amorphous region; coating an aqueous solution in which nickel particles are dispersed, on the second amorphous region and the SAM, wherein a larger amount of nickel particles than on the SAM are dispersed on the second amorphous region using a hydrophilicity difference between the second amorphous region and the SAM; vaporizing the SAM through an annealing process and simultaneously performing metal induced crystallization in which the nanoparticles are used as a medium, to crystallize the first and second amorphous regions and to form first and second crystallization regions; patterning the first and second crystallization regions to form first and second channel regions; and forming first and second electrodes on the first and second channel regions.

The invention relates to a preparation method of a polycrystalline silicon film, in particular to a method for preparing a polycrystalline silicon film by carrying out induced crystallization on an amorphous silicon film by cycle annealing under low temperature by using catalytic action of metallic copper. The main technical scheme of the invention is as follows: the method comprises the following steps of: growing a substrate / amorphous silicon / silicon dioxide / copper film structure on a glass substrate, then carrying out cycle annealing, putting a sample in corrosive liquid for corroding after first annealing is finished, and carrying out cycle annealing and corroding again, and drying the sample with nitrogen; and finally preparing the polycrystalline silicon film prepared by induced crystallization by copper, wherein the grain size is about 50-200nm. The method disclosed by the invention can ease the problem of serious metal pollution in the traditional MIC (Metal Induced Crystallization) technology and is suitable for the field of thin film field effect transistors and thin-film solar cells.

A method for forming polycrystalline semiconductor film from amorphous semiconductor film at reduced temperatures and / or accelerated rates. The inclusion of a small percentage of semiconductor material, such as 2% within the metal layer, reduces the temperatures required for crystallization of the amorphous semiconductor by at least 50° C. in comparison to the use of the metal layer without the small percentage of semiconductor material. During a low temperature isothermal annealing process adjacent Al-2% Si and a-Si films undergo a layer exchange resulting in formation of a continuous polycrystalline silicon film having good physical and electrical properties. Formation of polycrystalline-semiconductor in this manner is suitable for use with low temperature substrates (e.g., glass, plastic) as well as with numerous integrated circuit and MEMs fabrication devices and practices.

The invention provides a method for forming thin film transistors including a polycrystalline semiconducting film. The method comprises depositing a first layer of amorphous semiconducting thin film on to a substrate; depositing a second layer of thin film on to the first layer of amorphous semiconducting thin film; patterning the second layer or thin film so that the first layer of amorphous semiconducting thin film is exposed at selected locations; exposing the first and second layers of thin film to a nickel containing compound in either a solution or a vapor phase; removing the second layer of thin film; and annealing the first layer of amorphous semiconducting thin film at an elevated temperature so the first layer of amorphous semiconducting thin film converts into a polycrystalline semiconducting thin film.

Disclosed are a flat panel display and a manufacturing method thereof. In a flat panel display, a substrate includes a pixel area having a plurality of unit pixels, and a peripheral circuit area around the pixel area. The peripheral circuit area also includes a driving circuit for driving a plurality of unit pixels. At least one circuit thin film transistor is located in the peripheral circuit region and includes a first semiconductor layer crystallized by a sequential lateral solidification method. At least one pixel thin film transistor is located in the pixel area and includes a second semiconductor layer having a channel region crystallized by one of a metal-induced crystallization method or a metal-induced lateral crystallization method.