201 results about "Bch coding" patented technology

The invention provides a forward error correction encoding method, comprising the following steps: encoding the data stream according to the Reed-Solomon (RS) rules; interweaving the data stream afterbeing encoded by RS to serve as the input data stream of the BCH encoding; and encoding the data stream after being interwoven according to the BCH rules. Accordingly, the invention also provides a forward error correction encoding device which is characterized by comprising an RS encoding module, an interweaving module and a BCH encoding module. Accordingly, the invention also provides a forwarderror correction decoding method, comprising the following steps: decoding the data stream according to the BCH rules; de-interweaving the data stream after being decoded by the BCH rules to serve asthe input data stream of the RS decoding; and decoding the data stream after being de-interwoven according to the RS rules. The invention provides a forward error correction device which is characterized by comprising a BCH decoding module, a de-interweaving module and an RS decoding module. The method and device above realize the forward error correction with higher gain.

There is disclosed a memory device with an error detection and correction system formed therein, the error detection and correction system being configured to detect and correct errors in read out data by use of a BCH code, wherein the error detection and correction system is 4-bit error correctable, and searches error locations in such a way as to: divide an error location searching biquadratic equation into two or more factor equations; convert the factor equations to have unknown parts and syndrome parts separated from each other for solving them; and compare indexes of the solution candidates with those of the syndromes, the corresponding relationships being previously obtained as a table, thereby obtaining error locations.

The invention discloses a method for coding BCH in parallel, which comprises following steps: correspondingly multiplying input sequence {x1..., xi,..., xM} of current cycle respectively with a constant vector S, TS,..., TiS,..., TM-1S in turn, using the summation of the multiplication result as a first output, using the multiplication result of the last cycle output on a register group and a constant matrix TM as a second output, outputting the summation of the first output and the second output to the register group as the current cycle output of the register group, and obtaining final coding output through computing for certain quantity times of the steps. The method for coding BCH in parallel which is provided by the invention adopts an iterative algorithm, which has quicker arithmetic speed relative to a serial coding, eliminates lookup table compared with the parallel algorithm which is based on the lookup table, greatly reduces resource consumption, and effectively controls fan-out of a circuit. The invention also discloses a circuit and a coding device for coding BCH in parallel.

The invention discloses a generating method and an authentication method for a fragile watermarking by utilizing the theory of error-correcting codes. The generating method for the watermarking in the invention is that: carrying out wavelet transformation on a shrunken initial image and carrying out quantification on the low frequency coefficients of the wavelet transformation obtained by decomposing, then carrying out BCH coding on the formed binary data and the binary data comprising fingerprint binary data, then carrying out scrambling encryption on the binary data and the binary data comprising fingerprint binary data to from the final watermarking and embedding the final watermarking into the lowest bit of the original image. The authentication method for the watermarking includes: obtaining the lowest bit of the image to be authenticated, recovering the scrambling of the lowest bit and carrying out corresponding BCH decoding to obtain the information of the initial image, the fingerprint information and the information of the error position which are used for the complete authentication and copyright protection. When carrying out image authentication, the invention does not need the initial image as well as the initial watermarking information; the parameter management of the invention is simple. The invention can not only distinguish the tampering objects, preciously locate the tampering position and point out the tampering intensity, but also provide basis for the ownership problem of the copyright according to the embedded fingerprint information.

The present invention discloses a voice integrity protection method based on digital fingerprint, which develops a relatively perfect method for the realization of audio integrity protection. The method first provides a combined watermarked data coding / decoding method based on trellis coding, BCH coding and CRC coding to improve the error code correcting performance of a system, then a watermark extraction synchronizing method using an energy synchronization head signal as a positioning standard and re-synchronization as complementary means to realize an accurate positioning on watermark extraction operation, and finally a voice integrity protection method taking watermark information as a primary determination criterion and the abstract of the watermark information as an auxiliary determination criterion to realize the core technology of voice integrity validation; according to the method, the user can transparently embed voice integrity protection information into a voice signal in real time during normal communication.

A method for constructing a simplified trellis diagram for BCH-encoded information is disclosed. BCH-encoded information is received, having a corresponding parity check matrix H. The parity check matrix H is expressed as an ordered sequence of columns of matrices. A sequence of sub-code words is provided, corresponding to one or more code words, each satisfying a given condition. A matrix Hcp, having columns that are generated as a selected permutation of the columns of the matrix H through a column-permutation-for-binary-matching process, is provided, and a sequence of sub-matrices and a corresponding sequence of permuted sub-code words is provided. A trellis diagram, representing an ordered sequence of code word transitions in the received information and symmetric about a central location, is provided for each code word c, connecting n+1 stages, numbered i=0, 1, . . . , n, in an ordered sequence.

The invention discloses a method for encoding and modulating a physical frame signaling channel in an NGB-W system. The method comprises the following steps of: adding CRC (cyclic redundancy code) bits to physical frame signaling and scrambling the physical frame signaling; mapping the scrambled physical frame signaling into BCH (Broadcast Channel) code information bits; performing forward error correction coding to the BCH code information bits by BCH coding and LDPC (Low Density Parity Check) coding cascade methods; generating physical frame signaling check bits and forming physical frame signaling coding blocks; performing constellation mapping to the physical frame signaling coding blocks to generate BICM (Bit Interleaved Coded Modulation) blocks. The method is characterized in that a forward error correction coding solution with a reasonable structure and parameters, and LDPC codes including a QC-Raptor-Like structure and approaching a Claude Elwood Shannon threshold are adopted, and bit mapping of information with the changeable signaling length, code rate control and coding block generation can be supported; the physical frame signaling with the changeable length can be protected so that the transmission reliability of the physical frame signaling is relatively steady along with the change of the signaling length.

An efficient coding and modulation system for transmission of digital data over plastic optical fibers is disclosed. The digital signal is coded by a three-level coset coding. The spectral efficiency of the system is configurable by selecting the number of bits to be processed in each of the levels. The first level applies to the digital data a binary BCH coding and performs coset partitioning by constellation mapping and lattice transformations. Similarly, second level applies another binary BCH coding, which may be performed selectably in accordance with the desired configuration by two BCH codes with substantially the same coding rate, operating on codewords of different sizes. The third level is uncoded. The second and third levels undergo mapping and lattice transformation. After an addition of the levels, a second-stage lattice transformation is performed to obtain a zero-mean constellation. The symbols output from such three-level coset coder are then further modulated.