BCH code error correction method capable of adaptive error correction

Abstract

The invention discloses a BCH code error correction method capable of adaptive error correction, which belongs to the field of data error correction in non-volatile memories. The method comprises the following steps: 1) when a page programming erasing number of a NAND flash memory is less than or equal to a, selecting a sector-level BCH code as an error correcting code; 2) when the page programming erasing number of the NAND flash memory is more than a and less than b, selecting a page-level BCH code as an error correcting code; 3) when the page programming erasing number of the NAND flash memory is more than or equal to b, marking the page as an invalid page. The beneficial effect of the invention is that: when a sector-level BCH code is adopted, the response speed of the flash memory to a host is increased; when a page-level BCH code is adopted, the error correction performance is improved, and thus the service life of the flash memory is increased.

Description

technical field [0001] The invention belongs to the field of data error correction in non-volatile memory, in particular to a BCH code error correction method with self-adaptive error correction capability. Background technique [0002] NAND flash memory is widely used in large-capacity data storage products (including MP3, tablet computer, mobile phone, etc.). The manufacturing process of NAND flash memory is continuously shrinking, and the process node of the new generation of NAND flash memory can reach 25nm. As a result, the maximum number of programming and erasing times allowed by the flash memory is also continuously reduced. During the use of flash memory, with the continuous increase of programming and erasing operations, its internal bit error rate (BER) also increases continuously, so NAND flash memory products need to use error correction code technology to improve its performance. reliability. [0003] Error correction code technology is a technology that can...

AI Technical Summary

Problems solved by technology

The continuous shrinking of the manufacturing process can produce higher-capacity flash memory products on the same silicon chip area, thereby reducing the cost per bit of storage. However, the continuous shrinking of the manufacturing process also seriously reduces the reliability of flash memory. The maximum number of programming and erasing (P / E cycles) allowed by flash memory (an important indicator to measure the reliability of flash memory) is gradually decreasing. The current new generation of flash memory products will use 25nm process technology, and each memory cell stores 2- bit information, but the P / E cycles it allows are only 5000, which seriously reduces the reliability

Therefore, the shortcomings of the BCH code error correction system in the current flash memory are: BCH code has its fixed error correction capability, and the reliability of the new generation of NAND flash memory continues to decline. Once the number of bit errors in a page of flash memory exceeds the BCH code If the error correction capability of the BCH code is limited, the page will be regarded as a permanently invalid page, and the limited error correction capability of the BCH code will reduce the life of the NAND flash memory.

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