40results about How to "Reduced risk of splintering" patented technology

The invention relates to an elastic buffering decorating plate in building plates. The elastic buffering decorating plate comprises a decorating plate body and an adhering plate body, and a groove cavity for allowing the adhering plate body to be slidably embedded into and being matched with the adhering plate body in a telescopic mode is formed in the reverse side of the decorating plate. At least one plate edge of the adhering plate body and the corresponding groove inner edge in the groove cavity of the decorating plate body are slidably limited through a limiting sliding block, and the plate edges of the adhering plate body are provided with limiting sliding grooves slidably matched with the limiting sliding blocks. The ends, close to the reverse side of the adhering plate body, of the limiting sliding grooves are provided with assembling groove bodies with the depths being larger than the depths of the limiting sliding grooves. When the limiting sliding blocks are located in the limiting sliding grooves, part of each limiting sliding block protrudes out of the corresponding plate edge of the adhering plate body. When the limiting sliding blocks are located in the assembling groove bodies, the limiting sliding blocks are not exposed relative to the plate edges of the adhering plate body correspondingly. The groove inner edges, corresponding to the plate edges, in a recessed cavity of the decorating plate body are provided with positioning grooves for positioning the limiting sliding blocks, and the parts, protruding out of the plate edges of the adhering plate body when the limiting sliding blocks are located in the limiting sliding grooves, of the limiting sliding blocks are positioned by the positioning grooves. The recessed cavity of the decorating plate body is internally provided with buffering springs abutting against the decorating plate body and the adhering plate body. The elastic buffering decorating plate has the advantages that buffering is achieved, and replacement is easy.

An embodiment of the invention relates to the technical field of a semiconductor and especially relates to a wafer tapeout method so as to improve stress status of a wafer. The method comprises the following steps: carrying out front-side treatment process on the wafer to prepare scribing grooves in the front-side treatment process; after the front-side treatment process of the wafer, etching the scribing grooves; and carrying out back-side process on the wafer. The scribing grooves are etched after the front-side treatment process, so that the stress inside the wafer can be released, and the risk of wafer fragmenting and breaking in the follow-up process, such as back thinning, is reduced greatly.

The invention discloses a modular multi-chip packaging structure and a packaging method thereof. A plurality of packaging units are arrayed on a substrate, and the packaging unit is formed by a plurality of chips stacked in steps. The lead ends of the chips stacked in steps are located on the steps. On the surface, the lead ends of multiple chips are connected by chip wiring, and the chips do not need to be wired, which reduces the packaging volume of the chip and avoids the loss of electrical performance on the wirebond line. The plastic package is plastic-sealed. The bottom of the first plastic package is provided with an etched circuit connected to the chip wiring, and the connecting wiring is arranged on the substrate. The etched circuit at the bottom of the first plastic package is connected to the connection wiring on the substrate. Multiple packaging units are sealed on the substrate, and the chips are vertically placed on the substrate after plastic packaging. The independent modules can be packaged together to integrate different functions, which breaks the limitations of traditional multi-chip packaging, and has a simple structure. The connection is stable.

The present invention provides an LED manufacturing process, comprising providing a substrate, sequentially forming a buffer layer, a first semiconductor layer, a transition layer, a light-emitting layer, and a second semiconductor layer on the substrate; forming the first semiconductor layer During the process, the pressure of the reaction chamber is maintained at the first pressure, and during the process of forming the light-emitting layer, the pressure of the reaction chamber is maintained at the second pressure, and the second pressure is lower than the first pressure. During the formation of the transition layer, the pressure of the reaction chamber is The starting pressure of the body is equal to the first pressure, and the ending pressure is equal to the second pressure. In the present invention, by introducing a transition layer between the first semiconductor layer and the light-emitting layer, the continuous growth is maintained during the pressure change process at this stage, and the interfacial stress is reduced through the transition layer, so that the growth of the first semiconductor layer under high pressure conditions can be realized, and the growth rate can be increased. , due to the gradual reduction of pressure during the formation of the transition layer, the surface tensile stress of the first semiconductor layer gradually decreases, reducing the risk of cracks in the process.

The present disclosure provides a droplet ejection device and related methods. The droplet ejection device comprises: a piezoelectric chip, an interdigital transducer arranged on the upper surface of the piezoelectric chip; the ratio of the thickness of the piezoelectric chip to the period of the interdigital transducer is 1 to 3 ; The interdigital transducer excites surface acoustic waves and bulk acoustic waves in the piezoelectric chip under the drive of radio frequency signals, and the surface acoustic waves and the bulk acoustic waves are reflected on the upper and lower surfaces of the piezoelectric chip to generate recombination Acoustic waves, to drive the liquid to be driven on the liquid attachment area to stretch along the direction perpendicular to the surface of the piezoelectric chip to form a liquid column, so that the liquid column will have a droplet pinch-off effect at the end, and a single droplet will be ejected; the liquid The attachment area is located on the upper surface and / or the lower surface of the piezoelectric chip corresponding to the area covered by the propagation of the surface acoustic wave generated by the interdigital transducer along the surface of the piezoelectric chip. It solves the problems of complicated device structure, high cost, low efficiency, and inconvenient realization of on-demand injection.

The invention discloses a method for preparing a heterogeneous semiconductor thin film, comprising: obtaining a semiconductor single crystal wafer with a first polished surface; obtaining a heterogeneous substrate with a second polished surface; After depositing a layer of buffer layer on the top to form the first composite structure; implanting barrier layer ions into the semiconductor single crystal wafer to form a barrier layer; annealing treatment; implanting H ions into the semiconductor single crystal wafer along the channel of the semiconductor single crystal wafer, the H ion The atomic number is smaller than the atomic number of the barrier layer ions, and the implantation energy is greater than the implantation energy of the barrier layer ions; the buffer layer is removed; the semiconductor single crystal wafer is bonded to the heterogeneous substrate to obtain the second composite structure; annealing treatment is obtained to obtain the heterogeneous semiconductor film. The invention forms a barrier layer in the semiconductor single crystal wafer by implanting barrier layer ions to trap H ions, thus reducing damage caused by ion stripping, thereby greatly improving the utilization rate of H ions and the quality of the film.