396results about How to "Reduce wiring difficulty" patented technology

The embodiment of the invention discloses an image sensor module which comprises an image sensing chip, at least one auxiliary chip and a lens bracket. The image sensing chip and at least one auxiliary chip are packaged by a plastic package material to form a chip package body, the circuit faces of the image sensing chip and at least one auxiliary chip face the same direction. The image sensing chip comprises an image sensing unit and package glass arranged above the incident face of the image sensing unit, a light through hole corresponding to the package glass is formed in the front side of the chip package body, a wire re-arrangement graph electrically connected with the welding pad of the image sensing chip and the welding pads of at least one auxiliary chip is formed on the back side of the chip package body, and multiple convex points are formed on the wire re-arrangement graph. The lens bracket is installed on the front side of the chip package body, and a lens group is fixed to the lens bracket. The reliability of the image sensor module is improved, and the wire arrangement difficulty is reduced.

The invention provides a driving control method for an LED display screen. The method comprises the steps of (a) broadcasting a screen configuration command by a sending card in the wireless mode, and enabling a plurality of receiving cards to control respective loading areas thereof to respectively display the hardware identifier of each receiving card and the loading area information thereof so as to generate a data allocation table, wherein the data allocation table contains a loading position number allocated to each receiving card; (b) storing the data allocation table in the sending card, selectively and wirelessly broadcasting data messages generated based on the data allocation table to the plurality of receiving cards so as to enable the receiving cards to read their respective loading position numbers; and (c) according to the data allocation table, conducting the splitting and packaging process of input video data by the sending card so as to obtain video data packets, wirelessly broadcasting the video data packets to the plurality of receiving cards, and enabling the receiving cards to receive corresponding video data packet and drive their respective loading areas to display the received data according to the hardware identifiers of the receiving cards and the loading position numbers thereof. In this way, a real LED display system in the wireless mode can be realized.

The invention discloses a device for realizing dual-backup switching of an Ethernet link inside communication equipment, belonging to the technical field of product structures of devices for mainly realizing dual-backup of internal network links by systems in a communication technical equipment product. The device for realizing dual-backup switching of the Ethernet link inside the communication equipment comprises at least one main control mother plate, at least one main control opposite plate, at least one back plate and at least one business plate, wherein a structure, in which the main control mother plate and the main control opposite plate are in a dual-backup relation in whole device, control flow analysis and business flow direction control are mainly finished and only one main control plate is in a primary state while the other one main control plate is in a standby state at any time, is formed. By using the device disclosed by the invention, a fast switching effect can be realized on the basis of reducing the wiring difficulty and cost of the back plate and the business plate while the main and standby backups are switched.

The invention discloses a display substrate, a manufacturing method thereof, a crack detection method and a display device, relates to the technical field of display, and aims at solving the problemsthat an existing crack detection mode is complex in operation and wiring difficulty in an edge area of a display screen is easily increased. The display substrate comprises a pixel unit and a data signal line, wherein the data signal line is used for writing a data voltage signal into the pixel unit. The display substrate further comprises an electrostatic discharge circuit, and the electrostaticdischarge circuit comprises a first electrostatic discharge line and a second electrostatic discharge line; a first electrostatic discharge sub-circuit which is connected with the data signal line andthe first electrostatic discharge line, wherein a connecting line included in the first electrostatic discharge sub-circuit is reused as a crack detection line, and the crack detection line is located in a peripheral area, surrounding the display area, in the display substrate and extends along the edge of the display substrate. The first electrostatic discharge sub-circuit is used for conductingthe connection between the data signal line and the first electrostatic discharge line when the crack detection line is broken in a detection period. The display substrate provided by the invention is used for displaying.

An intelligent motorcar body network system comprises a semaphore input module, a front motorcar lamp module, a rear motorcar lamp module, a CAN / LIN gateway module, an electric window module, a wiper module, a central lock module and a rearview mirror module. The present invention applies both CAN and LIN buses for networking, realizing the distributed layout of a network, wherein the front motorcar lamp module, the rear motorcar lamp module, the semaphore input module and the CAN / LIN gateway module are connected together via the CAN bus to construct a network, along with which a motorcar power CAN network forms a large network, and the electric window module, the wiper module, the central lock module, the rearview mirror module and the CAN / LIN gateway module are connected together via the LIN bus to form a LIN network. The present invention is connected with the upper-layer CAN network by means of the CAN / LIN gateway module to perform information interaction. The present invention realizes the functions of information interaction with the motorcar power CAN bus, power supply management, etc. and reduces cost and cabling difficulties.

The invention discloses an FPGA (Field Programmable Gate Array) realization method for a multi-code-length LDPC (Low Density Parity Check) code decoder on the basis of a hierarchical NMS (Network Management System) algorithm, which comprises the following steps of: 1) replacing a check matrix of which the code rate is 1 / 2 in a WiMax protocol to obtain a new check matrix, and keeping the performance of the original matrix; 2) applying the new check matrix into a parallel hierarchical iterative decoding structure, generating the read-write address of a storage unit in a decoder by an address generation module, and realizing the design of a multi-code-length decoder; and 3) designing a memory structure according to the characteristics of a QC (Quality Control)-LDPC code in the design, and simultaneously reading and writing in information in each path of parallel processing unit. With the FPGA realization method, the storage volume of updated information in the decoding process is reduced, the information updating speed is effectively improved, the decoder iteration times is reduced, the decoding time delay is greatly lowered by the design structure of the memory, and the decoding efficiency is improved. Meanwhile, wiring is simple by a fixed cable of a storage unit and an updating unit, and the hardware realization difficulty is lowered.

The invention provides a submodule unit of a voltage source transverter based on full control components. The voltage source transverter is a three-phase six-bridge structure. Each bridge arm comprises a plurality of submodules which are connected in series. Each submodule comprises electric power components such as a capacitor, insulated gate bipolar translators (IGBT) modules with a structure of a semi-bridge, wherein the capacitor and the IGBT modules are connected in parallel. The submodule unit of the voltage source transverter based on the full control components further comprises a main support structure, a support plate, a connecting water pipe, radiators and the like. The main support structure is used for supporting the electric power components of the submodule unit, the support plate, the connecting water pipe and the radiators. The support plate is perpendicular to a base of the main support structure. The support plate is provided with the two radiators which are symmetrically arranged. The radiators are connected through the connecting water pipe. Two IGBT modules of each submodule are respectively arranged on the two radiators. The bottom of the capacitor of the each submodule is fixed on the base of the main support structure through bolts. The submodule unit of the voltage source transverter based on the full control components is a self-contained electrical system, is capable of expanding according to the need of the system, and is independent in structure and convenient to install and transport.

The invention relates to a wafer level packaging MEMS chip structure and a processing method thereof, and the structure forms a cavity structure for the movement of a comb tooth microstructure of a device layer through the sequential bonding of a cap layer, the device layer and a substrate layer. Electrical signals in the packaging cavity are led out from the side surface of the structure by crossing a substrate bonding sealing ring by a first-layer lead of a double-layer metal lead arranged on the substrate layer; after metal eutectic bonding wafer-level vacuum packaging is completed, deep silicon etching is carried out at a position corresponding to a metal electrode on the back surface of a substrate wafer to form a through hole, a conductive material is used for filling the through hole or forming a conductive silicon column, and electrode leading-out is carried out on the back surface. The structure can be integrated with a signal processing circuit in a flip-chip bonding mode. Compared with a mode of manufacturing a TSV through hole in a packaging cavity for electrical lead-out, the problem of packaging air tightness caused by filling a cavity with an insulating medium is avoided, and the problems of temperature stability and reliability caused by mismatching of thermal expansion coefficients of a filling material and a silicon material are also avoided.

The invention discloses an amplitude limiting device and an amplitude limiting method. The amplitude limiting device is used for calculating and limiting the operating amplitude of a telescopic arm of a telescopic arm frame type construction machinery vehicle, and comprises an ARM (Advanced RISC Machine) controller module, a tilting angle sensor module, a length measurement sensor module and a rotary coder module, which are connected through a CAN (Controller Area Network) bus. The amplitude limiting method comprises the following steps: obtaining the pitching angle of the telescopic arm, the rotary position angle of the telescopic arm and the arm length of the telescopic arm; according to the structural form, the pitching angle and the arm length of the telescopic arm, calculating the operating amplitude of the telescopic arm; according to the rotary position angle, looking up a corresponding amplitude limiting critical value in a pre-stored amplitude limiting critical value corresponding table; and according to the comparison result of the operating amplitude and the amplitude limiting critical value, limiting or warning the operating amplitude of the telescopic arm to guarantee the working safety of the construction machinery vehicle and avoid the roll-over accident.

A passive-matrix display device having a plurality of chiplets, each chiplet associated with one or more independent column electrodes located in the display area, each chiplet electrically connected to and driving a separate subset of the independent column electrodes and electrically connected to and driving a subset of the row electrodes to cause the light-emitting material in each pixel to emit light, wherein each chiplet includes a serial luminance shift register for shifting pixel luminance values corresponding to each independent column electrode from one chiplet to another and a column driver for driving each of the independent column electrodes to which it is connected with the corresponding pixel luminance values; and wherein each chiplet further includes a row driver for driving each corresponding row electrode to which it is connected and a row control shift register for controlling the row drivers.

The invention relates to a COB packaging structure of a light-emitting diode. The COB packaging structure comprises a substrate, n drive chips and n light-emitting diode chip sets, wherein each light-emitting diode chip set comprises N light-emitting diode chips, n and N are integers, n is larger than or equal to 1, N is larger than or equal to 1, the n drive chips and the n light-emitting diode chip sets are packaged on the front face of the substrate in a modular mode to form n sets of COB display modules, the n drive chips and the n light-emitting diode chip sets form lamp-driver co-plane devices in a one-to-one connection mode, a fixed number of bonding pads are arranged on the back face of the substrate, and all the drive chips and all the light-emitting diode chip sets are communicated with the bonding pads on the back face of the substrate in a routing and hole passing mode. The n lamp-driver co-plane devices are packaged to form a new COB device, the number of the bonding pads on the back face of the substrate is fixed and independent of the number of sets of the drive chips, and therefore a large number of pins are saved, external device cables are greatly reduced, and the higher density can be achieved compared with the density achieved through traditional packaging.

The invention provides a network isolation method and a network isolation device. The network isolation method comprises the steps of receiving a first message by first network accessing equipment, wherein the first message is transmitted from a physical server and carries label information, the physical server comprises a plurality of service bridges, different service bridges are connected with the first network accessing equipment through a physical network adapter of the physical server, and the label information is added by the service bridge which corresponds with the first message; determining second network accessing equipment which corresponds with a destination address by the first network accessing equipment when the label information matches the destination address that corresponds with the first message; and transmitting the first message to the second network accessing equipment by the first network accessing equipment through network core equipment so that the second network accessing equipment transmits the first message to the physical server which corresponds with the destination address, wherein the first network accessing equipment and the second network accessing equipment are connected with the network core equipment. The network isolation method and the network isolation device have advantages of realizing network isolation, reducing wiring difficulty and reducing network maintenance cost.

The embodiment of the invention discloses a plugging assembly comprising a first plugging element and a second plugging element arranged in pair. The first plugging element consists of a multi-path data set output pin group, a power supply pin group, and a ground pin group; and the second plugging element includes a multi-group data set output pin group, a display control signal output pin group, a multi-path ethernet interface pin group and a ground pin group. In addition, the embodiment of the invention also discloses a display screen control card including the plugging assembly and a display screen system.

The invention discloses a high-integration-level multi-beam tile-type TR component, which is characterized in that radio frequency signals input from a radio frequency common input port are subjected to multi-beam signal power division, amplitude-phase modulation and power amplification through a signal processing circuit on a radio frequency control board, and then are output through an antenna output port; power supply and control signals input from a port of the power supply and control connector are transmitted to the wave control daughter board and are transited to the radio frequency power supply board through the wave control daughter board for voltage conversion, and low-frequency signals subjected to voltage conversion are communicated with the radio frequency control board through the fuzz button fixing board, so that transmission of the power supply and control signals is realized. According to the TR assembly, the fuzz button fixing plate is added, the assembling difficulty and the wiring difficulty of the radio frequency power supply plate can be reduced, the size, position and distribution of bonding pads for power supply and signal control are more free, the integration number of DAC chips and radio frequency processing chips is increased, the integration degree of the multi-beam radio frequency signal TR assembly is improved. And the device has the characteristics of miniaturization and high stability.

The invention discloses an FPGA (field programmable gate array) remote update device which comprises an FPGA module, an embedded processor remote update system is arranged in the FPGA and comprises a communication module and a remote update module, the communication module is connected with an upper computer and the remote update module, and the remote update module is connected with a configuration FLASH through the FPGA module. The invention further discloses an FPGA remote update method. The method includes that S01, the upper computer sends an agreed program update instruction to the embedded processor remote update system, and the remote update module collects states of the update system to determine whether to receive the update instruction or not; S02, if update is allowed, the upper computer issues a data frame and sends the data frame to the remote update module for temporary storage of the data frame and completes update of the data frame according to specific timing of the configuration FLASH. The FPGA remote update device and method has the advantages of simpleness in principle, convenience in operation, low cost and the like.

The invention discloses a road sweeping and cleaning car electric control system based on touch screen control. The road sweeping and cleaning car electric control system based on the touch screen control comprises a programmable logic controller (PLC) (1) and a peripheral input and output circuit of the PLC (1), and is characterized in that the PLC (1) is connected with an operation panel (2) in cab through an RS485 or RS422 or controller area network (CAN) bus, and a touch screen controller (21) is arranged in the operation panel (2). The road sweeping and cleaning car electric control system based on the touch screen control has the advantages that the structure of the circuit is simple, the wiring difficulty is lowered, an original key switch is replaced by a touch screen, the integration degree is largely improved, the visibility and the operability are largely strengthened, the work state indication can be provided in real time, and the failure of the equipment can be resolved conveniently.

The invention provides a rigid-flex composite circuit board which is applicable to the manufacturing technical field of an integrated circuit plate. The rigid-flex composite circuit board comprises a hard board area and a soft board area. The hard board area comprises a hard board and a flexible board that stick to each other. Both the hard board and the flexible board are provided with a circuit. The soft board area comprises the flexible board that is also provided with the circuit. The flexible board of the hard board area is arranged on the outer surface of the hard board. The flexible board of the hard board area combines the flexible board of the soft board area as a whole, thus facilitating the arrangement of a blind hole or a buried hole according to the needs. So cost is saved and the application scope of the rigid-flex composite board is effectively improved. The invention also provides a method for manufacturing the rigid-flex composite circuit board. The hard board is cut at first and the circuit is arranged on the hard board. Afterwards, the flexible board sticks to the outer surface of the hard board. At last, an outer circuit is arranged on the flexible board. In the method, the hard board is positioned on the inner layer of the hard board, thereby facilitating the arrangement of the blind hole or the buried hole according to the needs.

The invention discloses a multifunctional socket capable of adjusting spacings between adjacent jacks. The multifunctional socket comprises a socket panel; the left and right sides of the socket panel are connected with plug boards through a telescopic rod; a sliding rail is formed in the middle part of the upper surface of the socket panel, and the length of the sliding rail is longer than that of the socket panel; a groove matched with the sliding rail is formed in one side, close to the sliding rail, of each plug board; the part, exceeding the socket panel, of the sliding rail is clamped with the grooves; jack boxes are arranged at the top end of the first telescopic rod; jacks are formed in the middle part of the upper surface of each jack box; an electric wire is arranged at the right end of a wire hole; and a plug is arranged at the right end of the electric wire. The multifunctional socket capable of adjusting spacings between adjacent jacks is simple in structure, convenient to operate, and capable of lowering electric shock probability of a child through a protective cover and further improving the spacing between the adjacent jacks by virtue of sliding of the sliding block and up and down movement of the first telescopic rod, so that the usage rate of the jacks can be improved and use of multiple sockets can be reduced, thereby lowering cost, lowering difficulty in wire arrangement and improving attractive degree.

The invention discloses an FFC (flexible flat cable) connector comprising a base, an upper cover, at least one spring and a positioner. The upper cover is rotatably hinged to the base. The springs are disposed on the base; the top ends of the springs protrude from the upper surface of the base; the bottom ends of the springs extend out of the lower surface of the base. The positioner protrudes from the upper surface of the base. The free end of the upper cover is provided with an extension part bent; the extension part is used for being fastened to the base. The invention further discloses a backlight module and a wiring device. The FFC connector allows an FFC to be well fixed and allows the FFC and a light bar component to be reliably and electrically connected; after the plug end of the FFC is electrified, the FFC can be electrically connected with various light bar components through the FFC connectors; a wiring mode is simple, fixing is reliable, FFC wiring difficulty is greatly decreased, and assembly efficiency of the backlight module is greatly improved; meanwhile, the wiring mode is higher in automation level, and a wiring process is greatly simplified.

The invention discloses an OLT (Optical Line Termination) optical module. The OLT optical module comprises an optical device, a PON (Passive Optical Network) data signal driver, a PON data signal limiting amplifier and an OTDR (Optical Time Domain Reflectometer) data processing module, wherein the optical device comprises WDM (Wavelength Division Multiplexing) which is dual-waveband WDM. By the invention, the cabling structure of a network can be simplified. Compared with the traditional network, the invention decreases OTDR equipment and WDM, reduces cabling cost and network cost of a PON system, and also lowers equipment and control complexity.

The invention discloses a digital to analog conversion circuit, a display panel and a display device. The digital to analog conversion circuit comprises a voltage division unit, a first segmentation unit, a second segmentation unit and a third segmentation unit, wherein a segmentation mode is adopted, by means of the mutual cooperation of the four units, only 257 voltage division signal ends are required to output 1024 analog signals with different voltages, compared with the manner of adopting 1024 voltage division signal ends in the prior art, the setting of the voltage division signal ends can be reduced, the structure is simplified, the wiring difficulty is reduced, and the production cost is reduced.

This invention discloses a communication method and a device, in which, the device includes a master controller, a sub-controller, a communication signal process card and a fiber communication signal process card are communication interface cards mounted on the master controller, every sub-controller includes a circuit used in communication shunt, the master and the sub-controllers are serial to each other by fibers and the method includes: a simple communication protocol is compiled, the master controller initiates all communication orders and assigns a different address code to each sub-controller, which receives the order from the master controller and feeds the received query order to the communication process card by the fiber to increase the usability of fibers.

The invention provides a bidirectional bus communication circuit which comprises a host device, a plurality of slave devices and buses, wherein the host device is connected with the slave devices via the buses; the host device comprises a host data sending circuit, a host data receiving circuit and a host CPU; and each slave device comprises a slave data sending circuit, a slave data receiving circuit and a slave CPU. The invention further provides a bidirectional bus communication method which comprises the following steps: S1, the host device supplies power for or charges the slave devices; S2, data of the host device data is downlinked, while the slave devices receive the downlinked data; and S3, data of the slave devices is uplinked, while the host device receives the uplinked data. The bidirectional bus communication circuit provided by the invention can adopt various topology modes, and supports various modes such as an annular mode and a star-like mode, so that the engineering difficulty is greatly reduced in the aspects of topology modes, cable cost and wiring difficulty, the bidirectional bus communication circuit can support long-distance communication, up to 128 slave loads, and a low-power mode, and anti-jamming capability is enhanced.

The invention relates to the technical field of robot joints, and discloses a highly integrated robot dual-joint unit. The highly integrated robot dual-joint unit comprises a first joint which is composed of a first motor and a speed reducer assembly, and a second joint which is composed of a second motor assembly and a second speed reducer, wherein a first output connecting rod is fixedly arranged on the first motor and an output shaft of the speed reducer assembly; the second speed reducer is arranged in a first output connecting rod; and the second motor assembly drives the second speed reducer through a transmission rod. According to the robot dual-joint unit disclosed by the invention, the fixed end of the second motor assembly, the first motor and the fixed end of the speed reducer assembly are fixed together, and the fixed end of a second motor of a conventional robot joint series structure is not fixedly arranged on the first motor and the output end of the speed reducer assembly, so that output inertia of two output shafts of the robot dual-joint unit is very small; and moreover, power cables which penetrate into the second motor assembly of the second joint are cancelled.

The invention discloses a V-BY-ONE signal processing method and device. The method comprises following steps of (1), receiving V-BY-ONE source image signals; analyzing the V-BY-ONE source image signals, thus obtaining a restoring clock and image data; (2), shearing the image data according to control signals, thus obtaining effective image data; storing the effective image data, thus obtaining storage data; (3), reading the storage data according to an output signal refresh rate; and coding the read storage data according to the restoring clock and a V-BY-ONE protocol, thus obtaining V-BY-ONE image signals. According to the method and the device, shearing and high speed caching are carried out to the V-BY-ONE source image signals; the restoring clock is taken as the reference clock of the output signals; the V-BY-ONE source image signals with the low refresh rate and a low lane quantity can be converted into the V-BY-ONE image signals with a high refresh rate and a high lane quantity; adoption of an external clock line is avoided; the wiring difficulty of a PCB is reduced; and the anti-interference capability and output quality of the signals are improved.

The invention relates to a packaged memory chip and an embedded device comprising the same. The memory chip comprises a packaged SPI (serial peripheral interface) NOR FLASH and a parallel PSRAM (pseudo static random access memory); the SPI NOR FLASH comprises a clock input pin and four input and output pins; the parallel PSRAM comprises a clock input pin CLK2 and more than four address input and data input and output pins; and the four input and output pins of the SPI NOR FLASH are respectively connected with optional four of the address input and data input and output pins of the parallel PSRAM, and the CLK1 is connected with the CLK2. According to the technical scheme, the area of the packaged memory chip can be reduced.

The invention discloses a high-integrated intelligent power module, wherein a logic control circuit and a drive circuit are arranged in the high-integrated intelligent power module IPM3, the high-integrated intelligent power module IPM3 generates two paths of output, the first path of output is U3, V3 and W3, the second path of output is U4, V4 and W4, wherein the first path of output drives an inverter compressor M3 of an inverter air conditioner, and the second path of output drives an inverter fan M4 of the inverter air conditioner. The high-integrated intelligent power module IPM3 comprises a control chip MCU2, a high-voltage integrated circuit HVIC3, a first analog switch K1, a second analog switch K2 and a third analog switch K3, wherein the control chip MCU2 controls the high-voltage integrated circuit HVIC3 through a first control signal PRO3, and controls the first analog switch K1 through a second control signal PRO4. The high-integrated intelligent power module has the characteristics of simple and reasonable structure, flexibility for operation, low manufacturing cost, high reliability and wide application scope.

The present invention relates to a high-voltage current transformer verification wiring device. The high-voltage current transformer verification wiring device includes a rack and a flatbed cart; the flatbed cart is provided with a plurality of grooves; the bottom of the rack is provided with a positioning channel; two sides of the positioning channel are provided with rubber chains driven by a motor; the top of the rack is slidably provided with a lifting pressing plate driven by a lifting driving mechanism; the bottom surface of the lifting pressing plate is provided with a plurality of metal pressing blocks at intervals; the metal pressing blocks are corresponding to bosses at the top ends of transformers; after the lifting pressing plate descends, the metal pressing blocks are electrically and correspondingly connected with the bosses; conductors are arranged between the metal pressing blocks, so that the transformers can be connected in series with two ends of a power source for detection; and two side portions of the rack are provided with a plurality of retractable elastic pushing pins. With the wiring device of the invention adopted, primary-side wiring and secondary-side wiring can be simultaneously performed on a plurality of transformers in a semi-automatic manner, and therefore, wiring efficiency can be improved, and wiring difficulty can be reduced. The device has the advantages of simple structure and convenient control, and can greatly improve verification efficiency and reduce labor intensity.

The invention discloses a high-density extendible KVM monitoring system, which belongs to the computer monitoring technology. A structure of the system comprises a control panel and controlled computers, wherein the control panel controls a plurality of controlled computers; each controlled computer is connected with a computer interface module; the controlled computers are connected with the computer interface modules through mouse cables, key cables and video cables; the plurality of computer interface modules are connected in series through super five category network cables to form controlled computer links, and each controlled computer link is connected to the control panel; a user monitors and operates the controlled computers through the control panel; and the control panel adopts high-speed switching technology and can extend n controlled computer links. Compared with the prior art, the high-density extendible KVM monitoring system integrates the multichannel switching technology into the user control panel seamlessly, so that the extendibility and signal quality of the system can be ensured better in narrow space.

The invention belongs to the technical field of wireless digital communication and particularly relates to a multi-code rate Turbo encoder and a storage resource optimization method thereof. The encoder mainly comprises a storage unit for storing input and output, external information, branch metric and forward state metric, a calculating unit for calculating branch metric, state metric, posterior probability, external information, address, and the like, a selecting unit and a main control unit. The optimization of the storage resource relates to storage block multiplexing, external information correction, disconnection, zero supplement and real-time calculation of interlacing address so as to eliminate the interlacing address storage block, and two dual-port RAMs are used for simplifying the branch metric cache. According to the multi-code rate encoder, the storage resource is reduced and optimized to the maximum extent and the chip area and the power consumption can be remarkably reduced. The invention is suitable for the third generation of mobile communication standard CDMA2000 and can be directly applied to the standard DVB-SH of the new generation of Europe mobile digital television.