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Multi-code rate Turbo encoder and storage resource optimization method thereof

A decoder and multi-bit rate technology, applied in the field of turbo code decoder and its storage resource optimization, can solve the problems of consuming chip area and power consumption, increasing the internal interconnection of the chip, etc.

Inactive Publication Date: 2011-01-05
FUDAN UNIV
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Problems solved by technology

These storage resources increase the complexity of chip internal interconnection and memory implementation in the process of VLSI implementation, and consume a lot of chip area and power consumption

Method used

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  • Multi-code rate Turbo encoder and storage resource optimization method thereof
  • Multi-code rate Turbo encoder and storage resource optimization method thereof
  • Multi-code rate Turbo encoder and storage resource optimization method thereof

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[0037] (1) Optimization of storage resources

[0038] The Turbo code in the DVB-SH standard specifies two code lengths of 1146 and 12282, 1 / 5, 2 / 9, 1 / 4, 2 / 7, 1 / 3, 2 / 5, 1 / 2, 2 / 38 There are 11 data puncturing modes. At the lowest 1 / 5 code rate, 1 systematic bit corresponds to 4 check bits, so the input storage block is 5 blocks, such as figure 1 The input storage block 102 in is shown. When the code rate is greater than or equal to 1 / 3 code rate, regardless of the puncturing mode, two of the four check digits must be completely deleted, so there must be two input memory blocks that can be reused.

[0039] Table 1 shows two traditional quantization schemes. Traditional scheme 1 is close to floating-point performance. Traditional scheme 2 will introduce a performance loss of 0.1dB. If the quantization bit width continues to be reduced, the decoding performance will deteriorate sharply. Two new quantization schemes can be obtained by using multiplexing of input storage blocks, t...

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Abstract

The invention belongs to the technical field of wireless digital communication and particularly relates to a multi-code rate Turbo encoder and a storage resource optimization method thereof. The encoder mainly comprises a storage unit for storing input and output, external information, branch metric and forward state metric, a calculating unit for calculating branch metric, state metric, posterior probability, external information, address, and the like, a selecting unit and a main control unit. The optimization of the storage resource relates to storage block multiplexing, external information correction, disconnection, zero supplement and real-time calculation of interlacing address so as to eliminate the interlacing address storage block, and two dual-port RAMs are used for simplifying the branch metric cache. According to the multi-code rate encoder, the storage resource is reduced and optimized to the maximum extent and the chip area and the power consumption can be remarkably reduced. The invention is suitable for the third generation of mobile communication standard CDMA2000 and can be directly applied to the standard DVB-SH of the new generation of Europe mobile digital television.

Description

technical field [0001] The invention belongs to the technical field of wireless digital communication, and in particular relates to a turbo code decoder supporting multiple code rates and a storage resource optimization method thereof, which are applicable to the mobile communication standard CDMA2000 and the new generation European mobile digital TV standard DVB-SH. Background technique [0002] Turbo codes are widely used in modern communication systems due to their error correction performance close to the Shannon limit, high throughput rate, and simple encoding, such as the third generation (3G) mobile communication standard CDMA2000, and mobile digital TV standard DVB-SH. Use Turbo code as its channel codec scheme. [0003] The performance of Turbo codes is related to the code length and code rate. The longer the code length and the lower the code rate, the better the error correction performance. The maximum code length of the above standards is greater than or equal ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L1/00H04L12/56H03M13/23
CPCY02B60/50
Inventor 陈绪斌葛云龙鲍丹吴川曹嘉麟周昌盛曾晓洋
Owner FUDAN UNIV
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