V-BY-ONE signal processing method and device

Abstract

The invention discloses a V-BY-ONE signal processing method and device. The method comprises following steps of (1), receiving V-BY-ONE source image signals; analyzing the V-BY-ONE source image signals, thus obtaining a restoring clock and image data; (2), shearing the image data according to control signals, thus obtaining effective image data; storing the effective image data, thus obtaining storage data; (3), reading the storage data according to an output signal refresh rate; and coding the read storage data according to the restoring clock and a V-BY-ONE protocol, thus obtaining V-BY-ONE image signals. According to the method and the device, shearing and high speed caching are carried out to the V-BY-ONE source image signals; the restoring clock is taken as the reference clock of the output signals; the V-BY-ONE source image signals with the low refresh rate and a low lane quantity can be converted into the V-BY-ONE image signals with a high refresh rate and a high lane quantity; adoption of an external clock line is avoided; the wiring difficulty of a PCB is reduced; and the anti-interference capability and output quality of the signals are improved.

Description

technical field [0001] The invention relates to the technical field of image signal processing, in particular to a V-BY-ONE signal processing method and device. Background technique [0002] With the continuous development of display panel manufacturing technology, 4K resolution display devices have been popularized on a large scale. It is expected that 8K and 10K ultra-high resolution display modules will appear in the market in the next few years. The signal sources of these ultra-high resolution display modules generally use V-BY-ONE signals. Due to the high resolution and large amount of image data, 8K resolution display modules generally use 32lane (data channel) or 64lane V -BY-ONE signal, 10K resolution display module will use 64lane V-BY-ONE signal. [0003] The ultra-high-resolution display module will use the V-BY-ONE image signal source with the function of static image point screen to test the display quality of its images in all aspects of R&D and production. ...

AI Technical Summary

Problems solved by technology

The external clock line will seriously affect the PCB design, making wiring more difficult. At the same time, the external clock line has poor anti-interference ability, which will affect the transmission length and signal quality of the cable.

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