30results about How to "Low leakage current" patented technology

The invention discloses a memory device, a manufacturing method thereof and an electronic device comprising the memory device. According to an embodiment, the memory device may include a plurality offirst columnar active regions, a plurality of second columnar active regions, a plurality of layers of first memory gate stacks and a plurality of layers of second memory gate stacks; the first columnar active regions and the plurality of second columnar active regions are formed on a substrate and extend upwardly; the first columnar active regions and the plurality of second columnar active regions are respectively arranged as a first array and a second array; each first columnar active region includes source / drain layers and channel layers which are alternately stacked; corresponding channellayers in the first columnar active regions are substantially coplanar; corresponding source / drain layers in the first columnar active regions are substantially coplanar; each second columnar activeregion includes an integrally-extending active semiconductor layer; the plurality of layers of first memory gate stacks are substantially coplanar with the channel layers; the plurality of layers of first memory gate stacks surround the peripheries of the channel layers on corresponding planes respectively; and the plurality of layers of second memory gate stacks surround the peripheries of the second columnar active regions respectively.

Disclosed are a storage device, a manufacturing method thereof, and electronic equipment including the storage device. According to an embodiment, a memory device may include: a plurality of first columnar active regions formed on a substrate and extending upward from the substrate, wherein each first columnar active region has a circular cross-section; a first storage gate formed on the inner sidewall of each first columnar active region; and a multilayer control gate formed around the outer sidewall of each first columnar active region.

The invention provides a method for preparing a bismuth ferrite film with dielectric property by adopting a liquid-phase self-assembly technology. The method comprises the following steps of: dissolving Bi(NO3)3.5H2O and Fe(NO3)3.9H2O which serve as raw materials into distilled water, and regulating the pH value of the solution by using glacial acetic acid; preparing a film by using citric acid as a complexing agent, using a functionalized self-assembly single-layer film as a template and suspending the template on the surface of the solution in a mode that the functionalized side of the template is downward through reverse adsorption; drying at room temperature, preserving the heat for 10 minutes at the temperature of 300 DEG C to remove organic substances, preserving the heat at the temperature of 550 DEG C and annealing to prepare a crystallized bismuth ferrite functional film, performing ultraviolet irradiation and reverse adsorption, drying and annealing; and repeating the steps till the bismuth ferrite functional film with the dielectric property is prepared. The bismuth ferrite film with the dielectric property is prepared by combining the advantages of liquid-phase self-assembly through multiple times of reverse adsorption and layer-by-layer annealing.

Disclosed are a semiconductor arrangement, a method of manufacturing the same, and an electronic device including the same. According to an embodiment, a semiconductor arrangement may include a first semiconductor device and a second semiconductor device sequentially stacked on a substrate. Each of the first semiconductor device and the second semiconductor device may include: a first source / drain layer, a channel layer, and a second source / drain layer stacked in sequence, wherein the channel layer includes the first and second source / drain layers. a different semiconductor material for the drain layer; and a gate stack formed around the periphery of the channel layer.