54results about How to "Increase full well capacity" patented technology

The invention relates to a complementary metal oxide semiconductor (CMOS) solid image sensor, and particularly relates to a photodiode and a method for improving the full-trap capacity and the quantum efficiency of an image sensor. In order to ensure that the extended full-trap capacity can be fully used up so that the extension is not based on wasting the streaking performance of images, and fundamentally improve key performance indexes of pixel units, such as dynamic range, signal to noise ratio, and sensitivity. In order to achieve the objective the invention adopts the following technicalscheme: an N buried layer with a shallower depth is injected to a P type epitaxial layer, a high-concentration P+-doped clamping layer is arranged on the N buried layer, a second N buried layer is arranged under the N buried layer, and a longitudinal P insertion layer structure is formed from the interface of the second N buried layer and the P type epitaxial layer to the inner part of the N buried layer. The photodiode and the method provided by the invention is mainly applied to the design and manufacture of the image sensor.

The invention relates to a complementary metal oxide semiconductor (CMOS) solid image sensor, and provides a small-size CMOS image sensor pixel photodiode structure, which ensures that an optimized small pixel unit can increase full-trap capacity under the condition of no increase of dark current, therefore dynamic range, signal to noise ratio and the like are indirectly increased, and the optimal design of the small pixel unit is completed. In order to achieve the purpose, the technical scheme adopted by the invention is as follows:, according to the small-size CMOS image sensor pixel photodiode structure, a pixel photodiode is formed by injecting a shallower N type region buried layer on a P type epitaxial layer, an N type region is of a U type buried layer structure formed by homotype impurities with larger diffusion coefficients, the middle of the U type buried layer structure is provided with homotype impurities with smaller diffusion coefficients; and an impurity injection layerwith a larger diffusion coefficient completely buries an impurity injection layer with smaller diffusion coefficient. The invention is mainly used for designing and manufacturing the CMOS solid imagesensor.

A detector circuit having an integration capacitor coupled to an amplifier via a switch matrix and a comparator coupled to the amplifier, the integration capacitor operable in two or more phases, the switch matrix is configured to phase switch the integration capacitor, the comparator triggers the phase switch when the output voltage of the amplifier passes the threshold voltage of the comparator.

A composite transfer gate is described, which is disposed over a semiconductor substrate between an electron reservoir and a floating node in the semiconductor substrate. The composite transfer gate includes at least one N-type portion and a P-type portion that are arranged laterally.

The invention relates to a high dynamic focal plane readout circuit and a sampling method thereof. The circuit comprises a capacitor transconductance amplifier, a sampling circuit and a source follower, wherein the capacitor transconductance amplifier comprises an amplifier, an amplifier reset switch and a first integrating capacitor which are arranged between a signal voltage input end and a signal voltage output end of the amplifier in parallel in a bridge connection manner, and a low-gain enable switch and a second integrating capacitor; and the low-gain enable switch and the second integrating capacitor are arranged between the signal voltage input end and the signal voltage output end of the amplifier in series. According to the high dynamic focal plane readout circuit provided by the invention, the first integrating capacitor and the second integrating capacitor constitute a low-gain integrating capacitor together, large full-well capacity can be realized, and serving as a high-gain integrating capacitor, the first integrating capacitor can provide small readout noise and a high conversion gain. Therefore, the high dynamic range focal plane readout circuit provided by the invention can meet the large full-well capacity and a small noise electron number at the same time and achieve a relatively high dynamic range.

An image sensor and a forming method thereof are provided. The forming method comprises: providing a semiconductor substrate having a front surface and a back surface; performing first ion implantation on the semiconductor substrate from the front surface of the semiconductor substrate to form a front photodiode doped region; performing second ion implantation on the semiconductor substrate from the back surface of the semiconductor substrate to form a back photodiode doped region, wherein the front photodiode doped region and the back photodiode doped regions communicate with each other. Theforming method can improve the sensitivity of the image sensor.

The invention provides a back-illuminated CMOS image sensor and a forming method thereof. The forming method of the back-illuminated CIS comprises the following steps: a P-type epitaxial layer is grown on a semiconductor substrate; an isolation trench for defining an active region of a pixel unit is formed in the P-type epitaxial layer; Forming a first N-type doped region of the photodiode on a selected region of the pixel active region; The first P-type ion implantation process is carried out on the P-type epitaxial layer by using the patterned mask layer as a mask to form a first part of theP-type insertion doped region of the photodiode, and the first part of the P-type insertion doped region is located in the first N-type doped region; A second P-type ion implantation process is carried out on the P-type epitaxial layer so as to form a second portion of the P-type insertion doped region of the photodiode, the second portion of the P-type insertion doped region being located in thefirst N-type doped region to deepen the junction depth of the PN junction of the photodiode, thereby facilitating the charge depletion of the first N-type doped region, thereby improving the full well capacity of the back-illuminated CMOS image sensor.

The invention discloses an image sensor and a forming method thereof. The method includes steps of providing a semiconductor substrate, wherein the semiconductor substrate comprises a front face and aback face; etching the semiconductor substrate from the front face of the semiconductor substrate to form a front groove, filling a medium material in the front groove; etching the semiconductor substrate from the back face of the semiconductor substrate to form a back groove, wherein the back groove is correspondingly connected with the front groove; the semiconductor substrate between the connected front groove and the back groove is used for forming a photodiode; filling the medium material in the back channel. The scheme can effectively reduce the electricity crosstalk, improve the thickness of the photodiode, and further improve the full trap capacity.

The invention provides a method for forming an image sensor, comprising the following steps: providing a photodiode region; performing a first doping on the photodiode region by a first ion implantation process to form a buried layer; performing a second doping opposite to the first doping on a central region of the buried layer by a second ion implantation process, or performing the third dopinghaving the same type as the first doping on an edge region of the buried layer by a third ion implantation process. The technical proposal provided by the invention can effectively improve the gradient of the electric potential change in the buried layer edge region, so that the electric potential in the region rapidly changes from low to high, thereby improving the photodiode storage capacity ofphotoelectrons and effectively improving the full well capacity. In addition, using the opposite type of second doping can also effectively prevent the occurrence of image smearing in the center region.

provided are a CMOS-TDI image sensor and forming method thereof, wherein the CMOS-TDI image sensor includes a substrate including a plurality of pixel region; A plurality of mutually discrete first doped regions located within a substrate of each of the pixel regions; A first gate structure located on a substrate surface of each pixel region, the first gate structure spanning a plurality of firstdoped regions. The advantage of that CMOS-TDI image sensor can improve charge transfer efficiency and image quality.

An image sensor includes a substrate and a plurality of infrared pixels formed in a front side of the substrate and configured to detect infrared light incident on the front side of the substrate. Each of the infrared pixels includes a photodiode, a region free of implants located above the photodiode, and a photogate formed over the substrate and above the photodiode. The image sensor also includes a plurality of color pixels dispersed among the infrared pixels, where each of the color pixels includes a pinned photodiode and is configured to detect visible light. The photodiode of each of the infrared pixels can include a deep charge-accumulation region underlying the pinned photodiode(s) of one or more neighboring color pixel(s). Methods of manufacturing also described and include forming the deep charge-accumulation regions and associated elements prior to forming any implant-blocking elements (e.g., polysilicon photogates) over the substrate.

The embodiment of the invention discloses a fingerprint recognition device and electronic equipment. The performance of the fingerprint recognition device can be improved. The fingerprint recognitiondevice is suitable for being arranged below a display screen to realize optical fingerprint recognition under the screen, the fingerprint recognition device comprises a plurality of fingerprint recognition units, and each fingerprint recognition unit comprises a micro lens; at least two light blocking layers, wherein each light blocking layer is provided with a light through hole to form two lightguide channels in different directions; the two pixel units are respectively positioned at the bottoms of the two light guide channels; wherein after fingerprint optical signals returned from a finger above the display screen are converged through the micro lens, two target fingerprint optical signals in different directions are transmitted to the two pixel units through the two light guide channels respectively. A plurality of groups of two pixel units in the fingerprint recognition device receive fingerprint optical signals in two different directions and convert the fingerprint optical signals into two fingerprint images, the two fingerprint images are moved and reconstructed into a reconstructed image, and the reconstructed image is used for fingerprint recognition.

The present disclosure provides CMOS image sensors and fabrication methods thereof. An exemplary fabrication process of a CMOS image sensor includes providing a substrate having a first region and a second region connecting with the first region at a first end of the first region: forming a transfer transistor on surface of the substrate in the second region; forming a first implanting region in the substrate in the first region using a first mask; forming a second implanting region in the first implanting region by, the first implanting region being separated into a third implanting region on the second implanting region and a fourth implanting region under the second implanting region; forming a fifth region in the second region at the first end using a second mask, connecting the third implanting region with the fourth implanting region.

The invention relates to an analog integrated circuit design, and aims to realize large full well and low electric leakage and improve the signal-to-noise ratio and the dynamic range of an image. Therefore, according to the technical scheme adopted by the invention, a PSD type transmission gate image sensor for reducing the feedforward effect comprises a photosensitive region PD, a transmission gate TG for controlling charge transfer from the PD to a storage node FD and a reset tube RST; when light irradiates a semiconductor, a part of light is absorbed by the semiconductor, when the absorbed energy is higher than the width of a silicon forbidden band, and an electron hole pair is generated; under the action of a built-in electric field, photo-induced electrons are collected by a depletion region in the PD; during reading, the TG is turned on, the TG under-gate channel is in a conducting state, photo-generated charges in the PD are transferred into the storage node FD, heavily-doped P-type doping is carried out on the transmission gate TG, low channel closing potential is obtained, and the barrier height of the PD and the channel is increased. The method is mainly applied to the design and manufacturing occasion of the CMOS image sensor.

The invention discloses an image sensor structure. The image sensor structure comprises a substrate and a dielectric layer from bottom to top, wherein a first photosensitive device is arranged on thesubstrate, a metal interconnection layer and a second photosensitive device are arranged on the dielectric layer, the second photosensitive device is arranged in a groove, the groove is located in thedielectric layer above the first photosensitive device, and the second photosensitive device is coupled with the first photosensitive device through the groove and is led out through the metal interconnection layer, wherein the second photosensitive device comprises a plurality of pn junctions which are horizontally distributed and coupled. According to the invention, the light absorption efficiency, the full well capacity and other sensor performances can be effectively improved, and the absorption efficiency of near-infrared light can be greatly improved.

The invention provides a preparation method of photodiodes, a photodiode and a CMOS image sensor. The preparation method includes: forming a shielding layer on a substrate, wherein the substrate has afirst doping type, and a preset position is arranged on the substrate, and the first doping type and the second doping type are different; processing the shielding layer to enable the thickness of the shielding layer above the preset position to be smaller than the thickness of the shielding layer above the non-preset position; performing ion implantation on the substrate, so that the implanted ions are formed into a curved surface having a second doping type to increase a contact area of the substrate and the region; and removing the shielding layer to obtain a photodiode. The preparation method of photodiodes increases the contact area of the substrate having a first doping type with a region having a second doping type, and increases the full well capacity.

The invention discloses a 4T pixel structure based on a semi-floating gate. The 4T pixel structure comprises a semi-floating gate device MSFG, three switching tubes and a capacitor, wherein the semi-floating gate device is used for collecting signal charges; the capacitor is similar to a photoelectric conversion region in a traditional 4T pixel, can be a capacitor of any type, is determined according to specific design and is used for converting a current signal output by the semi-floating gate device into a voltage signal; the three switch tubes can be switch tubes of any type, are determinedaccording to specific design, and are respectively used as a source follower MSF, a reset tube MRST and a selection tube MSEL; the source follower is used for signal amplification, and the reset tubeis used for resetting signals in the capacitor; and the selection tube is used for controlling the output of a pixel array row signal through a time sequence; The structure solves a problem of voltage distribution in a traditional 4T pixel photoelectric detection region and a photoelectric conversion region, and compared with a 1T pixel structure based on a semi-floating gate device, the pixel design with high full well capacity, large output swing and low noise can be realized.

The invention discloses an image sensor structure. The image sensor structure comprises a substrate and a dielectric layer from bottom to top, wherein a first photosensitive device is arranged on thesubstrate, a metal interconnection layer and a second photosensitive device are arranged on the dielectric layer, the second photosensitive device is arranged in a groove, the groove is located in thedielectric layer above the first photosensitive device, and the second photosensitive device is coupled with the first photosensitive device through the groove and is led out through the metal interconnection layer; and the first photosensitive device and the second photosensitive device respectively comprise a plurality of pn junctions which are horizontally distributed and coupled. According tothe invention, the light absorption efficiency, the full well capacity and other sensor performances can be effectively improved, and the absorption efficiency of near-infrared light can be greatly improved.

The present disclosure provides CMOS image sensors and fabrication methods thereof. An exemplary fabrication process of a CMOS image sensor includes providing a substrate having a first region and a second region connecting with the first region at a first end of the first region; forming a transfer transistor on surface of the substrate in the second region; forming a first implanting region in the substrate in the first region using a first mask; forming a second implanting region in the first implanting region by, the first implanting region being separated into a third implanting region on the second implanting region and a fourth implanting region under the second implanting region; forming a fifth region in the second region at the first end using a second mask, connecting the third implanting region with the fourth implanting region.

The invention provides an image sensor and a forming method of an image sensor pixel structure, and is applied to the technical field of semiconductors. A part of a gate structure of a transmission transistor in a pixel structure is expanded into a photodiode region in a semiconductor substrate by forming a trench, so that the width of the photodiode can be extended in the transverse direction while the effective area of the gate structure of the transmission transistor is increased, the electron transmission communication area is increased, the photo-induced electron transmission rate is improved, the electron residue at the bottom of the diode is reduced, and the full-well capacity of the photodiode is finally improved. The manufacturing cost of the chip can be reduced under the condition that the area and lighting of the chip are not influenced. In addition, due to the fact that the electron transmission communication area in the pixel structure is increased, electron residues at the bottom of the diode are reduced, and therefore white pixels are reduced.

The invention provides an image sensor and a forming method thereof. The image sensor comprises: a semiconductor substrate, wherein the semiconductor substrate comprises a first silicon substrate layer, a substrate oxidation layer and a second silicon substrate layer, which are stacked together; a transmission gate located on a surface of the second silicon substrate layer; a floating diffusion region located in the semiconductor substrate on one side of the transmission gate; a photodiode doping region located in the first silicon substrate layer; and a conducting structure located in the semiconductor substrate on the other side of the transmission gate, penetrating through the second silicon substrate layer and the substrate oxidation layer and electrically connected with the photodiode doping region. By adoption of the scheme provided by the invention, higher full well capacity may be obtained.

The invention provides a CMOS image sensor and a manufacturing method. The CMOS image sensor comprises a P-type substrate, a P-type epitaxial layer and a plurality of pixel units, wherein the P-type epitaxial layer is formed on the P-type substrate, an N-type buried layer, a P-type clamping layer, the P-type buried layer and the P-type epitaxial layer form a clamping photodiode, the N-type buried layer, the P-type clamping layer and the P-type buried layer are all formed in the P-type epitaxial layer, the P-type clamping layer is formed above the N-type buried layer, the P-type buried layer is embedded into the N-type buried layer, the P-type buried layer comprises at least two P-type sub-buried layers, and the at least two P-type sub-buried layers are distributed in the depth direction of the P-type epitaxial layer. By using the P-type buried layer formed in the N-type buried layer, the width of a depletion region of the clamping photodiode is expanded, the PN junction capacitance is increased, and the quantum efficiency and the full well capacity of the pixel unit are improved, so that the sensitivity and the imaging performance of a pixel unit are improved, the N-type buried layer is easier to deplete before exposure, and the reset noise is reduced.

An image sensor pixel structure is suitable for obtaining a first frame of image and a second frame of image of a target scene in the same exposure process so as to fuse the first frame of image and the second frame of image into one frame of image. The pixel structure comprises a first charge storage circuit and a second charge storage circuit, the first charge storage circuit is coupled with thefloating diffusion node and is suitable for storing an exposure signal corresponding to the second frame image after exposure is finished; and the second charge storage circuit is coupled with the first source follower circuit and is suitable for storing an exposure signal and a reset signal corresponding to the first frame image after exposure is finished. By applying the scheme, the photosensitive sensitivity of the CMOS image sensor can be improved, and meanwhile, the CMOS image sensor has a relatively high dynamic range.

The invention relates to an image sensor and a manufacturing method thereof. The image sensor comprises a semiconductor substrate, an epitaxial layer located on the surface of the semiconductor substrate, a photosensitive element, wherein the photosensitive element comprises a first photosensitive element positioned in the semiconductor substrate and a second photosensitive element positioned in the epitaxial layer; and the second photosensitive element extends to the first photosensitive element. According to the image sensor, the epitaxial layer is grown on the semiconductor substrate, and the first photosensitive element and the second photosensitive element are formed on the semiconductor substrate and the epitaxial layer respectively, so that the process limitation caused by single manufacturing of the light sensing elements is avoided, and the longitudinal size of the light sensing elements is increased, the full-well capacity of each pixel unit is improved; and in addition, thetransistors of the pixel units of the image sensor are formed on the epitaxial layer, so that the transverse size of the photosensitive elements is enlarged, and the full-well capacity of each pixel unit is improved.

The embodiment of the invention relates to an image sensor and electronic equipment. The image sensor includes: a plurality of pixel unit groups, at least one pixel unit group comprises a color filterarray, wherein the color filter array comprises M first type filters, N second type filters and a light blocking area, the light blocking area comprises N light blocking sub-areas, and each light blocking sub-area is adjacent to the N second type filters; a pixel unit array positioned below the color filter array; wherein the pixel unit array comprises M first pixels and N second pixels, whereinthe M first pixels are in one-to-one correspondence with the M first type filters respectively, the N second pixels are in one-to-one correspondence with the N second type filters and the N light blocking sub-areas respectively, the area of the second pixels is larger than that of the first pixels, and M and N are integers larger than 0. According to the image sensor and the electronic equipment,the dynamic range of the image sensor is enlarged.

The invention relates to an image sensor and a formation method thereof. The method comprises steps that a first semiconductor substrate and a second semiconductor substrate are provided; a reflectionstructure is formed on a front surface of the first semiconductor substrate and / or a front surface of the second semiconductor substrate; the front surface of the first semiconductor substrate and the front surface of the second semiconductor substrate are bonded; a pixel device is formed on a back surface of the first semiconductor substrate or a back surface of the second semiconductor substrate, and the pixel device includes photodiodes; light penetrating at least a part of the photodiodes is reflected by the reflection structure to at least a part of the photodiodes. The method is advantaged in that the transmitted light can be absorbed in a secondary time, and the absorbing capacity of the incident light is enhanced.

The invention discloses a large-full-well-capacity CCD with a corona resisting structure, and the CCD is an area array CCD which is composed of a plurality of pixels and is of a visible light frame transfer structure. The innovation of the CCD lies in that a single pixel comprises four transfer control gates, two barrier regions, two potential well regions, and two corona resisting gates. The beneficial effects of the invention are that the invention provides the large-full-well-capacity CCD with the corona resisting structure; the CCD is large in full well capacity; the quantum efficiency ofthe pixels is higher; the CCD is stronger in corona resisting capability; the CCD can effectively improve the image contrast and enlarge the dynamic range.

The invention discloses a shared pixel structure applied to automatic focusing and an image sensing device, and the structure comprises a first photodiode, a second photodiode, a first transmission transistor, a second transmission transistor, a floating diffusion point, a reset transistor, a source electrode following transistor, and a selection transistor. The first photodiode and the second photodiode are arranged at an interval, a connecting part is arranged between the first photodiode and the second photodiode, the shared pixel structure further comprises a control part, and the control part is used for controlling the connecting part to connect or disconnect the first photodiode and the second photodiode. According to the shared pixel structure and the image sensing device, the connecting part is arranged between the first photodiode and the second photodiode, so that the first photodiode and the second photodiode are connected or disconnected; the connecting part connecting the first photodiode and the second photodiode can increase the area of the whole photoelectric induction, so that the full well capacity is increased.

The embodiment of the invention discloses a multi-valued memory. The multi-valued memory comprises a plurality of memory sub-columns; each storage sub-column comprises a floating diffusion region and a plurality of storage units; the storage unit at least comprises a charge storage area and a corresponding transfer transistor; wherein the charge storage region comprises a semiconductor substrate, and the semiconductor substrate is provided with a hole structure; and the doped epitaxial layer is filled in the hole structure and forms a lateral PN junction capacitor with the semiconductor substrate so as to realize a charge storage function. The charge storage area of the storage unit is different from a traditional structure, the holes are formed in the charge storage area through etching, the charge storage area is prepared through epitaxy in the holes, and the structure of the charge storage area improves the full well capacity.