73results about How to "Increase component density" patented technology

A more efficient cooling system for densely packed electronic components for use in an out-of-doors equipment enclosure. An array of cooling assemblies are placed on heat generating components mounted to printed circuit boards mounted in enclosure racks. Each board has a manifold for intake and exhaust of refrigerant, and larger rack manifolds are substituted for rails and are attached to a backplane. A hybrid package including a ceramic hybrid power module and an attached array of cooling assemblies provide even more density of components and improved cooling.

This invention relates to a substrate with via and pad structure(s) to reduce solder wicking. Each via and pad structure connects a component to conductive layers associated with the substrate. The substrate includes one or more plated vias, solder mask(s) surrounding the plated vias, and a conductive pad with a conductive trace connected to each plated via. The conductive pad extends beyond the terminal sides to increase solder formation and the solder mask reduces solder formation at the terminal end of the component. The via and pad structure is suitable for a variety of components and high component density. The invention also provides a computer implemented method for calculating the maximum distance of a conductive pad extending beyond the terminal side of a component.

Structures and techniques for mounting semiconductor dies are disclosed. In one embodiment, the invention includes a stack of printed wiring board assemblies that are connected via interconnection components. At least one of the printed wiring board assemblies includes an interposer substrate having a constraining layer that includes carbon.

Organic laminate stack ups are disclosed for a variety of applications, including high frequency RF applications. One or more inner core layers may be disposed between outer layers along with bondply or prepreg layers as needed. Discrete devices, including surface mount components and flip chips, may be embedded within the organic laminate stack up structures. The embedding of the discrete devices, which may be active or passive devices, may be in the form of a layer of bondply or prepreg encapsulating the discrete devices. In addition or in the alternative, cavities may be formed in at least the outer layers for housing discrete devices, which include surface mount components, flip chips, and wire bonded integrated circuits. A variety of caps may be utilized to seal the cavities. Further, shielding may be provided for the organic laminate stack up structure, including through a wall of vias or a plated trench cut along at least one side of the stack up structure. Each stack up structure may be packaged in a variety of ways, including as a surface mount component, ball grid array, or land grid array.

A contact insert for a connecting terminal of a multiplicity of mutually isolated connection elements, designed in particular for printed circuit boards, with a spring force element being mounted symmetrically, with the spring force element designed with a simple section geometry and its simple mounting together with the advantageous connection to the contact insert, results in a closed terminal cage which makes it possible to reduce the physical height of the dielectric housing to a major The connecting terminal is used as a linking element in printed circuit board connection technology for providing a reliable supply to industrial electronics and economic individual wiring on printed circuits.

A hearing device is made by manufacturing a first functional part of a first material to provide a first function for the hearing device. A second functional part is manufactured of a second material to provide a second function for the hearing device. The first and second parts are assembled to form a composite part to provide both of the first and second functions at the hearing device. The second functional part is injection molded integrally with the first part while simultaneously performing manufacturing of the second part and assembling of the second part and the first part. The manufacturing and assembling of the first and second part take place within a common mold.

Multiple inductor structures and methods for providing low mutual inductance between the inductors are described. In various embodiments of the invention, the polarities of the inductors are positioned such that parasitic mutual inductance is reduced by causing electro-magnetic fields to at least partially cancel resulting in a reduction in interference between the inductors. The polarities of the magnetic fields produced by each inductor are opposite to each other so that at least a partial cancellation results when the fields interfere with each other.

A coil component is of the type where a helical coil is directly contacting a magnetic body, which is still capable of meeting the demand for electrical current amplification. A coil component, comprising a magnetic body mainly constituted by magnetic alloy grains, and a coil formed on the magnetic body; wherein an oxide film of the magnetic alloy grains is present on the surface of each of the magnetic alloy grains, and based on grain size by volume standard, the magnetic alloy grains have a d50 in a range of 3.0 to 20.0 μm, d10 / d50 in a range of 0.1 to 0.7, and d90 / d50 in a range of 1.4 to 5.0.

A trench MOSFET device comprising: (a) a silicon substrate (200) of a first conductivity type (preferably N-type conductivity); (b) a silicon epitaxial layer (202) of the first conductivity type over the substrate, the epitaxial layer having a lower majority carrier concentration than the substrate; (c) a body region (204) of a second conductivity type (preferably P-type conductivity) within an upper portion of the epitaxial layer; (d) a trench (206) having trench sidewalls and a trench bottom, which extends into the epitaxial layer from an upper surface of the epitaxial layer and through the body region of the device; (f) an oxide region (210t) lining the trench, which comprises a lower segment (210d) covering at least the trench bottom and upper segments covering at least upper regions of the trench sidewalls; (g) a conductive region (211g) within the trench adjacent the oxide region; and (h) a source region (212) of the first conductivity type within an upper portion of the body region and adjacent the trench. The lower segment (210d) of the oxide region is thicker than the upper segments of the oxide region in this embodiment.

The present invention provides a method of integrating an electrical fuse process into a high-k / metal gate process. The method simultaneously forms a dummy gate stack of a transistor and a dummy gate stack of an e-fuse; and simultaneously removes the polysilicon of the dummy gate stack in the transistor region and the polysilicon of the dummy gate stack in the e-fuse region. Thereafter, the work function metal layer disposed in the opening of the e-fuse region is removed; and the opening in the transistor region and the opening in the e-fuse region with metal conductive structures are filled to form an e-fuse and a metal gate of a transistor.

A computer case includes a blower, a bracket, and an air outlet defined in the computer case. The blower is received in the bracket, which is fixed outside the computer case. The blower includes an intake and an outlet, which are used to take away the heated air in the computer case. The intake of the blower communicates with the air outlet of the computer case. The computer case with an outside set blower for heat dissipating suits a requirement of heat dissipation of high-power computer systems.