44results about How to "Improve the conduction voltage drop" patented technology

The invention discloses a planar gate IGBT (Insulated Gate Bipolar Transistor) chip, which comprises a collector metal electrode, a P+ collector region, an N- drift region, a P- base region, a P+ ohmic contact region, an N+ source region, a gate oxide layer, a polysilicon gate and a gate metal electrode which are arranged successively, and an emitter metal electrode arranged above the P+ ohmic contact region, wherein the polysilicon gate of the planar gate IGBT chip adopts a planar gate structure. The planar gate IGBT chip also comprises a first N-type carrier buried layer and / or a second N-type carrier buried layer. The first N-type carrier buried layer is located below the P- base region. The second N-type carrier buried layer is located below the gate oxide layer and at both sides of the P- base region. The planar gate IGBT chip has the beneficial effects that the compromise relation between conduction pressure drop and turn-off loss of the IGBT is reduced, lower power consumption is realized, and thus the power density, the operating junction temperature and the long-term reliability of the IGBT chip are increased.

The invention relates to a power semiconductor technology, and particularly relates to a superjunction reverse-resistance IGBT with a variable doped field stop layer. Compared with a conventional superjunction reverse-resistance IGBT, the IGBT provided by the invention has the advantages that a superjunction structure is arranged in a drift region, and the concentration distribution of a first N-type layer is optimized: the concentration thereof gradually increases from left to right. The introduction of the superjunction structure makes an electric field in the drift region of the device in approximate rectangular distribution. Compared with the longitudinal electric field distribution of a conventional NPT reverse-resistance IGBT triangle, the same withstand voltage can be acquired in the shorter drift region length, thereby improving the compromise between the turn-on voltage drop of the device and the turn-off loss. According to the invention, the concentration distribution of thefirst N-type layer is optimized; punch-through of the first N-type layer is prevented when the device is at forward withstand voltage; and the first N-type layer can be completely depleted at the reverse withstand voltage and the peak electric field thereat is more uniform. The IGBT provided by the invention has the advantages that the bidirectional withstand voltage is realized, and the compromise between the turn-on voltage drop and the turn-off loss is optimized.

A trench-isolated lateral insulated gate bipolar transistor, comprising: a P-type substrate, on which a buried oxide layer is arranged, an N-type drift region is arranged on the buried oxide layer, and an N-type drift region is arranged below the upper surface of the N-type drift region. There is a P-type body region and an N-type buffer layer, and a P-type collector region is arranged in the N-type buffer layer. It is characterized in that a trench isolation layer is arranged in the N-type drift region, and the upper surface of the N-type drift region is connected to the The two corners formed by the trench isolation layer are respectively provided with a first P-type emitter region and a second P-type emitter region, and a metal electrode is connected to the first P-type emitter region and the second P-type emitter region , a third P-type emitter region is also provided below the upper surface of the N-type drift region, and a second emitter aluminum electrode is connected to the third P-type emitter region, and the second P-type emitter region and the third A second gate oxide layer is provided on the upper surface of the N-type drift region between the P-type emitter regions, a silicon nitride layer is provided on the second gate oxide layer, and a second polysilicon layer is provided above the silicon nitride layer. grid.

The invention provides a method for forming an IGBT device and its structure. The IGBT device has multiple functional cells and redundant cells between the multiple functional cells. The forming method includes: performing an ion implantation process on the semiconductor substrate in the first region of the redundant cells; and performing a first oxidation process to form a dielectric layer on the semiconductor substrate in the first region. That is, after performing the ion implantation process, the oxidation rate of the semiconductor substrate in the first region can be effectively increased, and a dielectric layer with a thicker and more uniform thickness can be formed, thereby effectively improving the gate and collector in the IGBT device. The capacitance Cgc between the electrodes. Moreover, the dielectric layer formed by combining the ion implantation and the first oxidation process has a smaller size, which reduces the area occupied by the redundant cells and greatly improves the conduction voltage drop of the IGBT device.

The invention discloses a carrier storage type IGBT which comprises a drift area, a P type body area, and a hole injection layer. Multiple first and second grooves are arranged alternately. Each of the second trenches is formed by the longitudinal superposition of a bottom trench and a top trench, and a gate dielectric layer and a polysilicon gate are formed in each of the first and two trenches. The bottom trench of the second trench is formed by using isotropic etching after forming the top trench. The bottom trench allows the coverage areas of the side face of the bottom area and the bottom surface of the second trench to be increased. When a device is conducted, a hole storage layer is formed by an N type accumulation layer formed by a drift area surface covered by the side face and bottom surface of the bottom trench. The invention also discloses a manufacturing method of the carrier storage type IGBT. According to the carrier storage type IGBT and the manufacturing method thereof, the storage effect of a hole at the drift area can be enhanced, the pressure drop and anti-latch performance of the IGBT are improved, and breakdown voltage is not sacrificed.

The invention discloses an RC-IGBT device and a preparation method thereof, belonging to the technical field of semiconductor power devices. The present invention uses semiconductor materials with different bandgap widths in traditional RC-IGBT devices to form collector short-circuit regions. The characteristic heterojunction structure, so that a single cell structure can eliminate the voltage snapback phenomenon (Voltage Snapback) in the forward conduction process of the traditional RC-IGBT, and optimize the current distribution and heat distribution in the drift region, avoiding current concentration and Reliability issues caused by heat concentration, and improve the reverse recovery capability of the device. Further, semiconductor materials with different forbidden band widths are used to form the emission region, and the forbidden band width of the emission region is larger than that of the semiconductor material in contact with it, thereby improving the anti-latch capability of the device.

A CSTBT device and a manufacturing method thereof belong to the field of semiconductor power devices. In the present invention, a trench gate structure is formed by introducing a trench split electrode under the gate electrode, a P-type layer is introduced under the trench split electrode, and a series diode structure is arranged above the trench split electrode, which solves the problem of traditional CSTBT devices by increasing the N The doping concentration of the type charge storage layer causes the problem that there is a contradictory relationship between the forward conduction performance and the withstand voltage performance of the device; the saturation current density is reduced, and the short-circuit safe working area of ​​the device is improved; the gate capacitance of the device is reduced, and the device is improved. The switching speed is reduced, the switching loss is reduced, and the switching performance of the device is improved; the electric field concentration effect at the bottom of the trench is improved to increase the breakdown voltage of the device; the carrier enhancement effect of the emitter terminal of the device is improved, and the entire N-drift region is improved The carrier concentration distribution of the present invention further optimizes the compromise characteristics of forward conduction voltage drop and turn-off loss; at the same time, the manufacturing method of the device of the present invention is compatible with the manufacturing process of the existing CSTBT device.

The invention relates to a backside collector structure of a power semiconductor device. According to the technical scheme provided by the invention, in the backside collector structure of the power semiconductor device, a P conductive-type gallium-nitride layer is arranged on the backside of an N conductive-type silicon substrate, and a collector is arranged on the backside of the P conductive-type gallium-nitride layer. According to the invention, a heterojunction structure is manufactured on the backside of the device, so that the injection efficiency is improved, and the conducting voltage drop of the device can be improved; and a heterojunction interface has more defects, so that a recombination center can be formed, and therefore, the service life of current carriers is reduced, and turn-off characteristics are improved.

The invention relates to the field of power semiconductors, and provides a planar gate IGBT device with a deep groove electric field shielding structure, which is used to overcome the excessive gate drive charge and small short-circuit safe working area of ​​the existing groove gate IGBT with a carrier storage layer And the problem of the limited concentration of the CSL layer; the present invention combines the deep groove traditionally used to make the trench gate IGBT channel with the P-type buried layer at the bottom of the groove to form an electric field shielding structure, and realizes the clamping of the potential of the carrier storage layer; Moreover, multiple deep grooves are set in one IGBT cell; thus, the concentration of the carrier storage layer of the IGBT of the present invention can be much higher than that of the traditional IGBT, which can have higher cathode injection efficiency and obtain better turn-on voltage The trade-off relationship between drop and turn-off loss. At the same time, the IGBT of the present invention has lower gate drive power consumption and lower saturation current density due to the adoption of a planar grid and an electric field shielding structure, thereby improving the safe working area of ​​the IGBT.

The invention belongs to the field of power semiconductors, and specifically provides a SiC power device, including a SiC MOSFET and a SiC IGBT; wherein: for a SiC MOSFET device integrated with a PN junction body diode, the reverse recovery charge of the body diode and related losses can be greatly reduced , Reduce the reverse recovery peak current, reduce EMI noise; for SiC MOSFET devices with integrated N-type Schottky diodes or integrated heterojunction diodes, it can reduce the voltage drop when the MOSFET is reversed, eliminate the minority carrier injection effect, thereby reducing the diode Conduction loss and reverse recovery loss; for reverse-conducting SiC IGBT devices with integrated PN junction body diodes, it can greatly reduce the reverse recovery charge of the body diode and related losses, reduce the reverse recovery peak current, and reduce EMI noise; For the reverse conduction SiC IGBT device integrated with N-type Schottky diode or heterojunction diode, it can reduce the voltage drop when the reverse conduction IGBT conducts in reverse, eliminate the minority carrier injection effect, and reduce the diode conduction loss and reverse recovery loss.