36 results about "Minority carrier injection" patented technology

Disclosed is a method of forming a semiconductor structure that includes a discontinuous non-planar sub-collector having a different polarity than the underlying substrate. In addition, this structure includes an active area (collector) above the sub-collector, a base above the active area, and an emitter above the base. The distance between the discontinuous portions of the discontinuous sub-collector tunes the performance characteristics of the semiconductor structure. The performance characteristics that are tunable include breakdown voltage, unity current gain cutoff frequency, unity power gain cutoff frequency, transit frequency, current density, capacitance range, noise injection, minority carrier injection and trigger and holding voltage.

A gated quantum well device formed as an MOS capacitor is disclosed. The quantum well is an inversion region less than 20 nanometers wide under the MOS gate. The device may be fabricated in either polarity, and integrated into a CMOS IC, configured as a quantum dot device or a quantum wire device. The device may be operated as a precision charge pump, with a minority carrier injection region added to speed well filling.

The present invention provides a p-i-n-(-n)-type GaN single-photon avalanche detector. The detector comprises a p-GaN upper contact layer, an i-GaN avalanche multiplication layer, an n<->-GaN hole-injection layer and an n-AlGaN lower contact layer arranged from up to down, wherein the n<->-GaN hole-injection layer is light doping. The p-i-n-(-n)-type GaN single-photon avalanche detector replaces an n-GaN layer with a traditional pin-type structure with the n<->GaN / n-AlGaN heterojunction, takes the n<->-GaN as an absorption injection layer, and takes the n-AlGaN as the lower contact layer so as to facilitate the improvement of the crystalline quality of epitaxial materials of an active region and improve the external quantum efficiency and the cavity minority carrier injection efficiency; and moreover, the parameters, such as doping concentration, thickness and the like, of the n<->-GaN layer are flexible and adjustable, and a very high avalanche gain can be obtained under the low work bias through compromise optimization.

A lateral bipolar semiconductor power device and a preparation method thereof belong to the technical field of semiconductor power devices. On the premise of keeping the cathode structure of the traditional bipolar power semiconductor device unchanged, the present invention introduces an anode trench gate structure and source region and / or base region in the anode region of the device, without affecting the normal operation and turn-on of the device. Under the circumstance, by controlling the anode trench gate structure, the forward conduction voltage drop of the anode diode is bypassed, so as to achieve the effect of reducing the forward conduction voltage drop of the power semiconductor device. After the anode diode is bypassed, the minority carrier injection from the anode region to the drift region is reduced, the reverse recovery process time of the device during turn-off is shortened, the turn-off speed of the device is improved, and the switching loss is reduced. The invention improves the carrier concentration distribution of the entire N-type drift region and the compromise between the forward conduction voltage drop and switching loss; and the device fabrication method does not require additional process steps, and is compatible with the traditional device fabrication method.

The invention discloses a super junction Schottky semiconductor device. When the semiconductor device is accessed to a certain reverse bias voltage, charge compensation is formed by a second conductive semiconductor material and a first conductive semiconductor material, a super junction structure is formed, the reverse breakdown voltage of the device is enhanced, and characteristics of conduction or blocking of the device are improved. Meanwhile, when the semiconductor device is accessed to a certain forward bias voltage, a first type Schottky barrier junction (assuming that the first conductive semiconductor layer adopts an N type semiconductor material) is in the forward bias conduction state, and a second type Schottky barrier junction (assuming that the second conductive semiconductor layer adopts a P type semiconductor material) is in the reverse bias cut-off state, therefore when in the forward conduction state, the device is still a conductive device with a single carrier, and minority carrier injection does not exist in the conductive device with the single carrier. The device has good switching characteristics. The invention also provides a preparation method of the super junction Schottky semiconductor device.