240results about How to "High process yield" patented technology

This invention relates to a semiconductor device having a beam made of a semiconductor to which strain is introduced by deflection, and a current is permitted to flow in the beam.

A touch sensing color filter including a substrate, a black matrix, a color filter layer and a second sensing electrode layer is provided. The black matrix is disposed on the substrate to define a plurality of sub-pixel areas. The black matrix includes a first sensing electrode layer, and the first sensing electrode layer has a plurality of openings corresponding to the sub-pixel areas. The color filter layer includes a plurality of color filter units disposed in the sub-pixel areas respectively. The second sensing electrode layer is disposed on the substrate, and the second sensing electrode layer includes a plurality of sub patterns corresponding to the sub-pixel areas. A method for fabricating the touch sensing color filter and a display panel using the same are further provided.

Processing techniques are disclosed for batch fabrication of microstructures comprising an oxide mask on a substrate with submicron openings formed therein, and microstructures having deep-submicron, high aspect-ratio etched trenches, using conventional optical photolithography. Exemplary high aspect-ratio etched-trench microstructures that may be produced include single crystal resonators and sensors.

Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH4 to WF6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metalizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1 mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1 mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

An apparatus for removing a polarizer of a liquid crystal display includes a roller portion including a rotating exfoliating roller and a gripping portion disposed on the exfoliating roller and gripping an edge of the polarizer, and a roller moving portion exfoliating the polarizer from a liquid crystal panel, the roller moving portion rotating and moving the roller portion. A rotating direction of the exfoliating roller is the same as a moving direction of the exfoliating roller.

A MEMS fabrication process eliminates through-wafer etching, minimizes the thickness of silicon device layers and the required etch times, provides exceptionally precise layer to layer alignment, does not require a wet etch to release the moveable device structure, employs a supporting substrate having no device features on one side, and utilizes low-temperature metal-metal bonding which is relatively insensitive to environmental particulates. This process provided almost 100% yield of scanning micromirror devices exhibiting scanning over a 12° optical range and a mechanical angle of ±3° at a high resonant frequency of 2.5 kHz with an operating voltage of only 20 VDC.

A method and structure for a solder interconnection, using solder balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate is disclosed. After a solder ball has been formed using standard methods it is reflowed to give the solder ball a smooth surface. A layer of low melting point metal, such as, bismuth, indium or tin, preferably, pure tin, is deposited on the top of the solder balls. This structure results in localizing of the eutectic alloy, formed upon subsequent low temperature joining cycle, to the top of the high melting solder ball even after multiple low temperature reflow cycles. This method does not need tinning of the substrate to which the chip is to be joined, which makes this method economical. It has also been noticed that whenever temperature is raised slightly above the eutectic temperature, the structure always forms a liquid fillet around the joint with copper wires. This liquid fillet formation results in substantial thermal fatigue life improvement for reduced stress at interface; and secondly, provides an easy means to remove chip for the purpose of chip burn-in, replacement or field repairs.

This invention relates to a semiconductor device having a beam made of a semiconductor to which strain is introduced by deflection, and a current is permitted to flow in the beam.

A laminated substrate structure composed of a plurality of dielectric layers and a plurality of circuit layers stacked with each other. Each of the dielectric layers has a plurality of via studs, and the circuit layers are electrically coupled with each other through the via studs. The laminated substrate structure of the present invention is characterized by adopting the embedded structure landless design that provides high reliability and better adherence. The present invention also provides a laminated substrate manufacture method. The dielectric layers having the patterned circuit and the dielectric layers having the via holes are formed first, and after the dielectric layers having the patterned circuit and the dielectric layers having the via holes are formed, they are aligned and laminated synchronously to complete the manufacture of the laminated substrate.

A cobalt-chromium-boron-platinum sputtering target alloy having multiple phases. The alloy can include Cr, B, Ta, Nb, C, Mo, Ti, V, W, Zr, Zn, Cu, Hf, O, Si or N. The alloy is prepared by mixing Pt powder with a cobalt-chromium-boron master alloy, ball milling the powders and HIP'ing to densify the powder into the alloy.

A method and structure for a solder interconnection, using solder balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate is disclosed. After a solder ball has been formed using standard methods it is reflowed to give the solder ball a smooth surface. A layer of low melting point metal, such as, bismuth, indium or tin, preferably, pure tin, is deposited on the top of the solder balls. This structure results in localizing of the eutectic alloy, formed upon subsequent low temperature joining cycle, to the top of the high melting solder ball even after multiple low temperature reflow cycles. This method does not need tinning of the substrate to which the chip is to be joined, which makes this method economical. It has also been noticed that whenever temperature is raised slightly above the eutectic temperature, the structure always forms a liquid fillet around the joint with copper wires. This liquid fillet formation results in substantial thermal fatigue life improvement for reduced stress at interface; and secondly, provides an easy means to remove chip for the purpose of chip burn-in, replacement or field repairs.

A cold-cathode tube has hitherto been used as a backlight for supplying illumination to a liquid crystal television but recently, light emitting diode pieces have been used for a backlight of a large-size liquid crystal television. For the purpose of improving the emission efficiency, flip chip mounting of the light emitting diode piece is advantageous but the mounting yield is restricted by the piece size, electrode structure and wire pattern structure, facing situations having difficulties in realizing simplified mounting and reduction of costs of members. In a liquid crystal display apparatus having a liquid crystal panel, an optical system and a light source, the light source includes a light emitting element structure having positive and negative electrodes, at least one of them being plural, and wires mounted to the positive and negative electrodes through flip chip mounting by making electrical correspondence to individual regions of the positive and negative electrodes.

A semiconductor device includes an organic semiconductor layer 10 and an oxide semiconductor layer 11, and emits light.

Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH4 to WF6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metalizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1 mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1 mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

An optical interference display unit, at least comprises a light-incidence electrode and a light-reflection electrode located on a transparent substrate. The light-incidence electrode at least comprises a transparent conductive layer and a dielectric layer. The light-reflection electrode at least comprises an absorption layer and a reflective layer.

A touch panel module including a cover and a transparent touch panel is provided. At least a portion of the transparent touch panel is directly connected to the cover. A method of fabricating the touch panel module including the following steps is also provided. First, a transparent touch panel is provided. Next, the cover is formed using injection molding technology such that at least a portion of the transparent touch panel is directly connected to the cover.

A method and installation for energy densification of a material to obtain pyrolytic oils for energy. The method includes preconditioning the material by heating and drying to raise the material temperature close to 100° C. and a relative humidity not exceeding about 10%; pyrolyzing the material that is subsequently caused to flow through a substantially hermetic reactor containing at least one transfer screw or vibrating tube heated by the Joule effect, the material heated progressively in the range of 300° C. to 850° C., the electrical power passing through the transfer screw or the vibrating tube for providing heating regulated as a function of the material in order to obtain the desired temperature level during the transit time of the material through the reactor; extracting pyrolysis gas from a high portion of the reactor for rapid recondensation in a vertical condenser; and recovering pyrolytic oils from a low portion of the vertical condenser.

The invention discloses a process of preparing Dehydroandrographolide Succinate Sodium and Potassium salts with Potassium Dehydroandrograpolide Succinate. The process comprises the steps of: weighing right amount of Potassium Dehydroandrograpolide Succinate, adding absolute ethyl alcohol about 3 to 6 times to make suspension; weighting mole Sodium bicarbonate in equal weight, adding water to dissolve, dripping slowly Sodium bicarbonate solution in potassium dehydroandrograpolide succinate suspension in a water bath at a temperature of between 40 and 60 DEG C, mixing into liquid medicine and defecating, dissolving impurity and filtering, putting on a 0.22 mu m filter membrane, adding absolute ethyl alcohol about 7 to 12 times while mixing, after 10 to 30 minutes of mixing, natural crystallization seeds out after 13 to 18 hours standing in room temperature; filtering and washing 2 to 3 times with right amount of absolute ethyl alcohol; filtering and drying with less pressure. The invention provides a process route of preparing potassium sodium dehydroandroan drographolide succinate for injection with high purity, which is high in process yields, high in product purity, good in solubility, less in impurity and complete in combination of Potassium and Sodium; no obvious toxic and side effect in clinic application, the preparation is more stable compared with the similar and can be prepared into various preparations.

Processing techniques are disclosed for batch fabrication of microstructures comprising an oxide mask on a substrate with submicron openings formed therein, and microstructures having deep-submicron, high aspect-ratio etched trenches, using conventional optical photolithography. Exemplary high aspect-ratio etched-trench microstructures that may be produced include single crystal resonators and sensors.

A method for singulation of thick GaN wafers (e.g., 300-400 um) through the use of a double-side laser-scribe process. In a preferred embodiment, the patterned GaN substrate is processed using a laser-scribe on each side of the substrate to form scribe lines. The scribe lines are aligned to each other. In a preferred embodiment, the substrate has not been subjected to a thinning or polishing process for reducing its thickness.

The invention discloses an ethoxy diphenylethane derivative and a preparation method and application thereof. The 4, position of a B aromatic ring of phenylethane is chemically modified by an ethoxyl group, and simultaneously, a hydroxyl group at the 3, position of the B aromatic ring of the phenylethane is modified into water-soluble pro-drugs such as phosphate and the like, and likewise, an amino acid side chain is introduced into an amino group at the 3, position to form an amino acid amide water-soluble pre-drug having a structure as shown by a structural formula (I). An ethoxy phenylethane derivative and a pre-drug thereof have strong capacity of inhibiting tubulin aggregation, have obvious targeted destructive functions to tumor vessels, selectively cause the tumor vessels to have dysfunctions and structural damages, induce the apoptosis of vascular endothelial cells so that tumor cells lose the support of nutrition and oxygen gas, and give play to the functions of killing and wounding the tumor cells or inhibiting the tumor metastasis.

The present disclosure relates to a two-dimensional fiber array structure including a base which includes a baseboard, a cover board and a spacer layer, and an optical fiber cable is positioned between the baseboard and the cover board, positioning fibers are positioned at two external sides of the optical fiber cable, the spacer layer is abutted with two adjacent fiber layers of the optical fiber cable to reduce the position tolerance along X axis for further improving accuracy, whereby ensuring quality and stability of transmitting optical signal.

A wafer bonding process that compensates for curvatures in wafer surfaces, and a wafer stack produced by the bonding process. The process entails forming a groove in a surface of a first wafer, depositing a bonding stack on a surface of a second wafer, aligning and mating the first and second wafers so that the bonding stack on the second wafer contacts a bonding site on the first wafer, and then heating the first and second wafers to reflow the bonding stack. The groove either surrounds the bonding site or lies entirely within the bonding site, and the heating step forms a molten bonding material, causes at least a portion of the molten bonding material to flow into the groove, and forms a bonding structure that bonds the second wafer to the first wafer. Bonding stacks having different lateral surface areas can be deposited to form bonding structures of different heights to compensate for variations in the wafer gap.

The present invention relates to a high yield process to prepare high purity crystalline glycolic acid using a multi-loop crystallization process characterized by high liquid and / or solid recycle, said process suitable for large scale purification and producing high purity glycolic acid with low diglycolic acid content.

Disclosed are high purity synthetic silica material having an internal transmission at 193 nm of at least 99.65% / cm and method of preparing such material. The material is also featured by a high compositional homogeneity in a plane transverse to the intended optical axis. The soot-to-glass process for making the material includes a step of consolidating the soot preform in the presence of H2O and / or O2.

The invention discloses a process of preparing Dehydroandrographolide Succinate Sodium and Potassium salts. The process includes: heating and dissolving Dehydroandrographolide Succinate with 3 to 6 times of absolute ethyl alcohol; adding mole KHCO3 and NaHCO3 in equal weight into water and dissolving in a water bath; dripping slowly while mixing in the temperature of between 50 and 80 DEG C until solution defecates, filtering and putting on a 0.22 mu m filter membrane, adding 7 to 11 times of absolute ethyl alcohol while mixing until the solution is even, standing in room temperature until natural crystallization seeds out, filtering and washing 2 to 3 times with absolute ethyl alcohol, fitering and drying with less pressure to obtain a canary solid. The invention provides a process route of preparing potassium sodium dehydroandroan drographolide succinate for injection with high purity, which uses Dehydroandrographolide Succinate as the raw material, is added with potassium bicarbonate and sodium bicarbonate directly to compose Potassium Sodium Dehydroandroan drographolide Succinate, which is high in process yields, high in product purity, good in solubility, less in impurity and complete in combination of Potassium and Sodium; the product is high in purity and good in solubility without obvious toxic and side effect in clinic application, the preparation is more stable compared with the similar and can be prepared into various preparations.

A method for singulation of thick GaN wafers (e.g., 300-400 um) through the use of a double-side laser-scribe process. In a preferred embodiment, the patterned GaN substrate is processed using a laser-scribe on each side of the substrate to form scribe lines. The scribe lines are aligned to each other. In a preferred embodiment, the substrate has not been subjected to a thinning or polishing process for reducing its thickness.