Non-
volatile memory devices and a method thereof are provided. A non-
volatile memory device according to an example embodiment of the present invention may include a first
transistor including a source, a drain, and a control gate, a first storage node coupled to the first
transistor, the first storage node configured to store information in a first manner, a first
diode having a first end connected to the source of the
transistor, the first
diode configured to rectify a flow of current from the source of the transistor and a second storage node connected to a second end of the first
diode, the second storage node configured to store information in a second manner. Another non-
volatile memory device according to another example embodiment of the present invention may include a
semiconductor substrate having a first
conductivity type including an active region defined by a device isolating layer, a source region and a drain region formed by
doping an
impurity having a second
conductivity type in the active region, a control gate
electrode insulated from the active region, the control gate
electrode extending across the active region disposed between the source region and the drain region, a first storage node layer interposed between the active region and the control gate
electrode configured to store information in a first manner, a second storage node layer disposed on the source region configured to store information in a second manner and a diode interposed between the source region and the second storage node layer to rectify a flow of current to the source region. The example method may be directed to obtaining a higher storage capacity per
cell area in either of the above-described example non-volatile memory devices.