30results about How to "Excessive diffusion" patented technology

A method for fabricating MOS-FET using a SOI substrate includes a process of ion implantation of an impurity into a channel region in a SOI layer; and a process of channel-annealing in a non-oxidized atmosphere. In the ion implantation process, a concentration peak of the impurity is made to exist in the SOI layer. Moreover in the channel-annealing process, the impurity is distributed with a high concentration in the vicinity of the surface of the SOI layer under the following condition with the anneal temperature as T (K) and annealing time as t (minutes):506×1000 / T−490<t<400×1000 / T−386.

An absorbent article having a compressed region formed by a compressing process in an absorption layer on a side facing to the backsheet; and a plurality of pressed grooves are formed by a pressing process in the absorption layer on a side facing to the topsheet, within a region opposed to the compressed region.

In a monolithic dual-laser semiconductor laser device capable of high power output, a window structure for each of laser elements is formed through a common step, thereby improving the device reliability. The semiconductor laser device has an infrared laser element li0 and a red laser element 120 monolithically integrated on an n-type semiconductor substrate i01. Each of the infrared and red laser elements 110 and 120 has a ridged waveguide and a window structure formed by Zn diffusion at each resonator facet. The infrared and red laser elements ii0 and 120 include p-type contact layers 109 and 119 on the ridges of the respective waveguides. The p-type contact layer 109 is thinner than the p-type contact layer 119.

A thin film containing a dopant is deposited on a surface of a semiconductor wafer. The semiconductor wafer on which the thin film containing the dopant is deposited is rapidly heated to a first peak temperature by irradiation with light from halogen lamps, so that the dopant is diffused from the thin film into the surface of the semiconductor wafer. The thermal diffusion using the rapid heating achieves the introduction of the necessary and sufficient dopant into the semiconductor wafer without producing defects. The surface of the semiconductor wafer is heated to a second peak temperature by further irradiating the semiconductor wafer with flashes of light from flash lamps, so that the dopant is activated. The flash irradiation which is extremely short in irradiation time achieves a high activation rate without excessive diffusion of the dopant.

Upon manufacture of a semiconductor device provided with a source region and a drain region formed by activating, through anneal, an n-type first dopant ion-implanted in a p-type device forming area provided in a semiconductor layer formed on an insulator, and a body region, (a) ion implantation of Ar in a boundary region between the source and drain regions to be formed, which corresponds to a region lying in a predeterminate area for forming the body region, and (b) high-temperature anneal for partly recovering crystal defects produced by the ion implantation of the Ar at a temperature higher than the anneal for activation of the first dopant are carried out prior to the ion-implantation of the first dopant.

An electrochemical reaction unit cell including an electrolyte layer containing Zr, an anode disposed on one side of the electrolyte layer in a first direction, a cathode containing Sr and disposed on another side of the electrolyte layer in the first direction, and a reaction preventing layer disposed between the electrolyte layer and the cathode. The reaction preventing layer contains Zr in an amount of 0.015 wt % to 1 wt %.

A thin film photoelectric conversion device for performing photoelectric conversion of a wide range of light, from the visible range to the infrared range, is provided. A plasmon resonance phenomenon, which enhances a photo-induced electric field, is caused in a wide range of light, by a metal nanostructure which is formed by annealing a substrate on which a first metal thin film layer composed of a first metal and a second metal thin film layer composed of a second metal which is partially overlapped onto the first metal thin film layer are laminated, and in which a periodic structure, wherein a number of first convex parts successively lie with a pitch of from one-tenth of a wavelength of an incident light to a wavelength equal to or shorter than the wavelength of the incident light in a planar direction along the substrate, is formed on the surface of the substrate; and a random structure, wherein a distance between any pair of a number of second convex parts formed at random positions on the substrate, or a distance between a second convex part and a first convex part is shorter than 100 nm, is formed on the substrate in a position within a region of the periodic structure or in a position adjacent to the region of the periodic structure, and as a result, high sensitivity photo-induced current is generated.

A method of fabricating a metal-oxide-semiconductor transistor is provided. A first gate structure and a second gate structure are formed on a substrate. The first gate structure has a dimension greater than the second gate structure. Then, first lightly doped drain regions are formed in the substrate on two sides of the first gate structure. A lightly doped drain annealing process is performed. Next, second lightly doped drain regions are formed in the substrate on two sides of the second gate structure. First spacers are formed on the sidewalls of the first gate structure and second spacers are formed on the sidewalls of the second gate structure at the same time. Afterwards, first source / drain regions are formed in the substrate on two sides of the first spacers and second source / drain regions are formed in the substrate on two sides of the second spacers. A source / drain annealing process is performed.

A laminated ceramic electronic component that includes a laminated body formed by laminating a ceramic layer and an internal electrode, and forming an external electrode on an outer surface of the laminated body so as to be electrically connected to the internal electrode. The external electrode includes a conducting layer that is in contact with the internal electrode, and the internal electrode contains Ni. The conducting layer contains metal particles containing a Cu3Sn alloy, and a thermosetting resin. The internal electrode and the conducting layer are bonded to each other with a CuSnNi alloy phase interposed therebetween.