352 results about "Data level" patented technology

A smart memory computing system that uses smart memory for massive data storage as well as for massive parallel execution is disclosed. The data stored in the smart memory can be accessed just like the conventional main memory, but the smart memory also has many execution units to process data in situ. The smart memory computing system offers improved performance and reduced costs for those programs having massive data-level parallelism. This smart memory computing system is able to take advantage of data-level parallelism to improve execution speed by, for example, use of inventive aspects such as algorithm mapping, compiler techniques, architecture features, and specialized instruction sets.

Methods of programming a wordline of multi-level flash memory cells (MLB) having three or more data levels per bit corresponding to three or more threshold voltages are provided. The present invention employs an interactive program algorithm that programs the bits of the wordline of memory cells in two programming phases, comprising a rough programming phase and a fine programming phase to achieve highly compact Vt distributions. In one example, cell bit-pairs that are to be programmed to the same program pattern are selected along a wordline. Groups of sample bits are chosen for each wordline to represent each possible program level. The sample bits are then programmed to determine a corresponding drain voltage at which each sample group is first programmed. This fast-bit drain voltage (Fvd) for each program level essentially provides a wordline specific program characterization of the Vt required for the remaining bits of that wordline. In the rough programming phase, the bits of core cells are then programmed from a starting point that is relative to (e.g., slightly less than or equal to) the fast-bit Vd and according to a predetermined Vd and Vg profile of programming pulses. The bits of the complementary bit-pairs are alternately programmed in this way until the Vt of the bits attains a rough Vt level, which is offset lower than the final target threshold voltage level. Then in the second fine programming phase, the bits of the MLB cells of the wordline are further programmed with another predetermined Vd and Vg profile of programming pulses until the final target threshold voltage is achieved. The Vd and Vg profiles of programming pulses may further be tailored to accommodate the various bit-pair program pattern combinations possible. In this way, the bits of each wordline are fine-tune programmed to a data state to achieve a more precise Vt distribution, while compensating for the effects of complementary bit disturb.

A parallel object detection method for heterogeneous microarchitectures. The method is designed for increasing the throughput of object detection in a computer system that is equipped with an array of cores including a shared memory, a constant memory, and functional units. Latency reduction is achieved through a multilevel parallelization method that exploits fine-grain data-level parallelism using multithreaded SIMD computations, and coarse-grain parallelism by relying on concurrent kernel execution.

A circuit for adjusting the phase of a clock signal. A first sampling circuit generates a sequence of data samples in response to transitions of the clock signal, each of the data samples having either a first state or a second state according to whether an incoming signal exceeds a first threshold. An second sampling circuit generates an error sample in response to one of the transitions of the clock signal, the error sample having either the first state or the second state according to whether the incoming signal exceeds a second threshold. A phase adjust circuit adjusts the phase of the clock signal if the sequence of data samples matches a predetermined pattern and based, at least in part, on whether the error sample has the first state or the second state.

A data management apparatus for digital advertising includes a data integration processor for collecting and storing data from providers, resolving heterogeneity of the data at schema and data levels, and performing validity checks of the data; an analytics processor for receiving validated data from the data integration processor and providing to users custom, nesting-aware, SQL-like query language and a library of data mining methods, machine learning models, and analytical user profiles (AUP); and an activation processor for encapsulating complex computations performed in real-time, segment evaluation, and online user classification using runtime user profiles (RUP).

The invention provides a Continuous Data Protection CDP system and the realizing method thereof. The system comprises a management tool module, a main body module and physical equipment. The system can perform flexible stack. The management tool module is used for building the main body module with a temporal point, and performing the operations of reading, writing and storing to the main body module, according to the difference of the data access frequency and the data level, the important data which is accessed recently adopts a CDP technique with a fine grit, the non-important data which is not accessed often adopts a back-up protection technique with a coarse particle size, thereby the invention can support continuous data protection of different protection granularities, through the flexible stack structure, the requirement of the data memory capacity is reduced, while the reliability for the data continuous protection is not reduced.

A method for validating information, wherein a first information item is detected essentially continuously, at least for the duration of its relevance, by a vehicle-to-X communication device, wherein a second information item is detected at the same time as the first information item by at least an individual sensor or a group of sensors, wherein the at least one individual sensor or the group of sensors is coupled at the data level to the vehicle-to-X communication device and wherein the first and / or second information items are validated by reconciling an information content of the first and second information items in the case of corresponding information content. The method is distinguished by the fact that the second information item is detected in an essentially discontinuous fashion.