The invention relates to a novel message controller and a communication method thereof, which can realize high-speed communication between multiple processors, includes one or more sets of message controller register files, the message controller
register file is connected to the processor through a
bus or a network, The message controller
register file is connected with a memory through a
bus ora network. The message controller
register file is composed of a
write pointer register, a read pointer register, an effective unit number register, an effective unit number register, a memory
base address register and a memory capacity register. The message controller register file comprises a
write pointer register, a read pointer register, a valid unit number register, a memory
base address register and a memory capacity register. The advantages of this scheme are: high speed communication; There are no restrictions on the types of queues, including, but not limited to, first-in, first-outqueues and first-in, second-out queues; The types of queues can be selected according to the application
scenario. Each processor can read and write to this message controller via an on-
chip bus or network, and the message controller itself does not specify directionality.