The invention discloses a parallel implementation method of real-time
phase noise hardware generators. By the adoption of the method, real-time, high-speed and parallel
phase noise simulation can be achieved at an FPGA processor. According to the method, firstly, on the basis of the FPGA high-speed and parallel implementation method of uniform
white noise of a
cellular automaton theory, a calculation method of N-way initialization vectors needed by the parallel implementation and a recurrence function relation of the parallel generating
algorithm of the
cellular automaton are given; then, on the basis of real-time
parallel generation of
white noise, parallel first-order IIR filter banks are designed, and by setting a
gain value at a corner frequency,
noise output which meets features of a power law spectrum is achieved by filtering; finally, an equivalent form of the
phase noise is obtained from the
white noise, and is superposed with effective signals to complete the phase
noise simulation. Under the condition of low FPGA source consumption, the method rapidly generates white
noise which is long in cycle, large in
band width and good in quality in real time, and on this basis, a parameter-controllable phase-noise
simulation hardware generator is achieved.