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110 results about "CORDIC" patented technology

CORDIC (for COordinate Rotation DIgital Computer), also known as Volder's algorithm, is a simple and efficient algorithm to calculate hyperbolic and trigonometric functions, typically converging with one digit (or bit) per iteration. CORDIC is therefore also an example of digit-by-digit algorithms. CORDIC and closely related methods known as pseudo-multiplication and pseudo-division or factor combining are commonly used when no hardware multiplier is available (e.g. in simple microcontrollers and FPGAs), as the only operations it requires are addition, subtraction, bitshift and table lookup. As such, they belong to the class of shift-and-add algorithms.

Reconfigurable floating-point operation device based on CORDIC algorithm

A reconfigurable floating-point arithmetic device based on CORDIC algorithm comprises a preprocessing module for completing input data from IEEE-754 standard, and maps it into the convergence region;a series-parallel hybrid reconfigurable CORDIC iterative unit module. The iterative operation part of CORDIC algorithm is composed of two parts: rotation modules A and B, wherein, the rotation moduleA is used to realize serial pipeline structure to maximize module reuse, the rotation module B is based on parallel prediction method of rotation direction and adopts tree adder structure to realize parallel structure in rotation mode; in the post-processing module, the corresponding result output is selected according to the encoded signal of the pre-processing module, and the mantissa normalization processing is completed to output the single-precision floating-point data format calculation result. The invention has the characteristics of simple principle, low delay, high precision and low hardware cost.
Owner:BEIJING INSTITUTE OF TECHNOLOGYGY

Elementary transcendental function operation method based on floating point arithmetic unit and coprocessor for method

The invention provides an elementary transcendental function operation method based on a floating point arithmetic unit and a coprocessor for the method. According to the method, a coordinate rotation digital computer (CORDIC) algorithm is decomposed into a function operation control part and a floating point calculation part; the function operation control part is used for finishing an operation control function of the CORDIC algorithm; and the floating point calculation supports absolute value solution, addition / subtraction, multiplication, division, evolution and comparison operation of floating point number, and a general register used in the floating point calculation can be read and written by a function operation control module. A special mathematical function calculation component is redesigned as required in the conventional method, so the conventional method is complex in control and structure and high in consumption of hardware resources. By adding the function operation control module with a simple structure, transcendental function operation is realized by using the existing floating point operation instruction based on the existing floating point arithmetic unit; and the function operation control module is simple in structure and easy to implement and apply, and can support calculation of trigonometric and anti-trigonometric functions, hyperbolic function, exponential function and logarithmic function.
Owner:XI AN JIAOTONG UNIV

Method for realizing general demodulation of different modulating signals

InactiveCN101977176AConvergence Angle ExpandedLarge convergence angleMultiple carrier systemsLow-pass filterSynthesis methods
The invention discloses a method for realizing general demodulation of different modulating signals. The method comprises the following steps: firstly, using the direct numerical frequency synthesis method to generate two routes of local orthogonal carrier signals by expanding the rotation mode under the circumferential coordinate in the coordinated rotation digital computer (CORDIC) algorithm ofa convergence domain to synthesize equidirectional subcircuit data xI (t) and orthogonal subcircuit data xQ (t) with receiver terminal output signals; then filtering secondary harmonic components by a low pass filter; afterwards, inputting two routes of signals into a general demodulation module of the vector mode under the circumferential coordinate in the CORDIC algorithm of the convergence domain; finally, selecting a square root operation value or an arc tangent operation value according to different modulation modes to obtain demodulation information by filtering or differencing. In the invention, various modulation modes are integrated in the same hardware, so that the method has the characteristics of good flexibility and outstanding versatile performance; and meanwhile, the complex arithmetic operation is transformed into the displacement and add operation, as a result, the method can greatly reduce the complexity of hardware realization and has good carrier frequency mismatching resistance property.
Owner:ZHEJIANG UNIV

Trigonometric function arithmetic device based on combination of feedback of coordinated rotation digital computer (CORDIC) algorithm and pipeline organization

ActiveCN102981797AReduce overheadSolving technical problems at ever-increasing scaleDigital data processing detailsProcessor registerParallel computing
The invention discloses a trigonometric function arithmetic device based on combination of feedback of a coordinated rotation digital computer (CORDIC) algorithm and a pipeline organization. The trigonometric function arithmetic device comprises a register block module based on software configuration, an arithmetic control module and a fake pipeline arithmetic iteration unit. The register block module based on the software configuration comprises two kinds of registers of A and B. The arithmetic control module is responsible for connection of the arithmetic control module and the fake pipeline arithmetic iteration unit. The fake pipeline arithmetic iteration unit is composed of n levels of pipeline units used for achieving the CORDIC algorithm. According to the fake pipeline CORDIC algorithm structure based on configuration, on the premise that hardware circuit pay expenses are not increased and parallel trigonometric function computation is supported to a certain extent, trigonometric function operation without limit accuracy is achieved by means of a fake pipeline form in which outputs of the arithmetic iteration unit are continuously fed back to inputs of the arithmetic iteration unit.
Owner:NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH

Efficient decision method for real non-linear arithmetic constraints

A system and method for solving a decision problem having Boolean combinations of linear and non-linear operations includes translating the non-linear real operations using a COordinate Rotation DIgital Computer (CORDIC) method programmed on a computer device into linear operations maintaining a given accuracy. Linear and translated linear operations are combined into a formula. Satisfiablity of the formula is solved using a decision procedure for Boolean combinations of linear operations over integers and reals.
Owner:NEC CORP

Orthogonal frequency division multiplexing (OFDM) equalizer

A novel and simplified orthogonal frequency division multiplexing (OFDM) equalizer uses a coordinate rotation digital computer (CORDIC) to convert the estimated channel effects from rectangular coordinate to polar coordinate and to compensate the phase error with the same CORDIC circuit of synchronization. The OFDM equalizer comprises: a fast Fourier transformer (FFT), to conduct Fourier transformation to received signals to obtain samples of the received signals; a channel estimation circuit to estimate channel effects of a received signal as transformed by the FFT to generate a channel effect estimation value; a coordinate translator, comprising a CORDIC circuit, to translate the channel estimation value into a polar coordinate value; a pilot extractor, provided downstream to the FFT, to extract pilot signals and to track minor phase offsets of the received signal to synchronize phase of said received signal; a phase rotator to compensate phase of the received signal according to the channel estimation value and the phase tracking estimation value, to generate the real value and imaginary value of the phase compensated signal; and an amplitude adjustment circuit to adjust amplitude of the compensated signal according to the amplitude adjustment value of the channel effect estimation value of the channel estimation circuit. In the present invention, the coordinate translator and the phase rotator use the same CORDIC circuit.
Owner:KUEI ANN WEN

Trigonometric function CORDIC iteration operation coprocessor and operation processing method thereof

The invention relates to a trigonometric function coordinate rotation digital computer (CORDIC) iteration operation coprocessor. The coprocessor comprises a CORDIC iteration operation unit, an operation result output unit and an angle range conversion unit, wherein the CORDIC iteration operation unit performs CORDIC iteration operation according to an input angle and outputs an operation result to the operation result output unit; the angle range conversion unit divides the input angle by pi / 2 in the CORDIC iteration operation unit to obtain a quotient and decomposes the quotient into an m part, an n part and a p part; the quotient is 4*m+n+p, m and n are integers, n is more than or equal to 0 and less than or equal to 3, and p is a floating-point number of less than 1; and the CORDIC iteration operation unit performs CORDIC trigonometric function iteration operation on the value of p*pi / 2. Through the technical scheme, the trigonometric function CORDIC iteration operation coprocessor supports full-angle trigonometric function operation and has higher operation efficiency.
Owner:TECHTOTOP MICROELECTRONICS

Multi-Channel Timing Recovery System

The present invention discloses a novel multi-channel timing recovery scheme that utilizes a shared CORDIC to accurately compute the phase for each tone. Then a hardware-based linear combiner module is used to reconstruct the best phase estimate from multiple phase measurements. The firmware monitors the noise variance for the pilot tones and determines the corresponding weight for each tone to ensure that the minimum phase jitter noise is achieved through the linear combiner. Then a hardware-based second-order timing recovery control loop generates the frequency reference signal for VCXO or DCXO. A single sequentially controlled multiplier is used for all multiplications in the control loop.
Owner:TRIDUCTOR TECH SUZHOU

Full-pipeline floating-point trigonometric function device based on combination of CORDIC and Taylor

The invention discloses a full-pipeline floating-point trigonometric function device based on combination of CORDIC and Taylor algorithms. The device comprises a preprocessing module which is used for judging whether a taylor expansion algorithm is started or not according to an input angle Z and converting the input angle Z from a double-precision floating-point format into a fixed-point format; a cordic algorithm calculation path module which is used for finishing calculating sine and cosine results of the input angle Z, wherein when N is smaller than 13, obtained results are precise results and are output; a taylor algorithm calculation path module which is used for finishing calculating sine or cosine of the input angle Z, wherein only when the N is greater than or equal to 13, the taylor algorithm is selectively started; and a postprocessing module which is used for carrying out normalization processing on calculation results of the cordic algorithm and selectively outputting the sine and cosine calculation results. The device has the advantages of low delay, low error and full pipeline.
Owner:NAT UNIV OF DEFENSE TECH

Low-overhead iteration triangular function device based on T_CORDIC (Coordinated Rotation Digital Computer) algorithm

The invention provides a low-overhead iteration triangular function device based on a T_CORDIC (Coordinated Rotation Digital Computer) algorithm. The low-overhead iteration triangular function device comprises a pre-processing module, a rotary direction predication module, a CORDIC algorithm compressive iteration multiplexing module, a cut-off fixed-point multiplier multiplexing module, a state control module and a post-processing module, wherein the pre-processing module is used for finishing conversion of an input angle from a floating point format to a fixed point format of IEEE-754 standards and judging whether a Taylor algorithm is started or not; the rotary direction predication module is used for providing sign prediction on compressive iteration in the CORDIC algorithm and providing a multiplicator for parallel computing; the CORDIC algorithm compressive iteration multiplexing module is used for finishing calculation of front n / 2 times of compressive iteration in the CORDIC algorithm; the cut-off fixed-point multiplier multiplexing module is used for finishing the calculation of a Taylor expansion equation in the former period and finishing the calculation of parallel iteration in the CORDIC algorithm; the state control module is used for coordinating the multiplexing of the CORDIC algorithm compressive iteration multiplexing module and the cut-off fixed-point multiplier multiplexing module; and the post-processing module is used for selecting result output of a triangular function according to a result signal judged by the pre-processing module and converting the result to the floating point format of the IEEE-754 standards from a fixed point. The low-overhead iteration triangular function device based on the T_CORDIC algorithm has the advantages of simple principle, low delay, low errors, low overhead and the like.
Owner:NAT UNIV OF DEFENSE TECH

CORDIC algorithm-based capacitive micro-accelerometer signal detection device

InactiveCN101738495AOvercome the shortcomings of being susceptible to environmental factors such as temperatureSuppress low frequency noiseAcceleration measurementBandpass filteringDigital down converter
The invention discloses a CORDIC algorithm-based capacitive micro-accelerometer signal detection device. The device comprises a capacitive micro-accelerometer sensor, a charge amplifying module, an analogue-to-digital converter, a field programmable gate array, a first digital-to-analogue converter, an analogue bandpass filter and a second digital-to-analogue converter, wherein the capacitive micro-accelerometer sensor, the charge amplifying module, the analogue-to-digital converter, the field programmable gate array, the first digital-to-analogue converter and the analogue bandpass filter are orderly connected; and the field programmable gate array is also connected with the second digital-to-analogue converter. The CORDIC algorithm-based capacitive micro-accelerometer signal detection device can regulate the phase, the frequency, the amplitude and the like of carrier signals in real time so as to achieve good flexibility, adopts high-frequency carrier modulation to suppress low-frequency noise, such as l/f noise and the like, adopts a digital modulation mode to overcome the defect that an analogue system is easy to be influenced by environmental factors, such as temperature and the like, and can control algorithm accuracy through iteration times and a data word size.
Owner:ZHEJIANG UNIV

Extensible QR decomposition method based on pipeline working mode

The invention provides an extensible QR decomposition method based on a pipeline working mode. A layered and cascaded structure is adopted, wherein pipeline operation is realized among layers; two lines of matrix data of each layer are subject to Givens rotation; the Givens rotation is conducted by using a coordinate rotation digital computer (CORDIC) algorithm and realized by using operations of addition and displacement; the layer number is determined by the line number or the row number of matrices; a whole QR decomposition module consists of a controller and a data processing module; a line rotation module is arranged on each layer of the data processing module; output ports of upper layers of line rotation modules are connected with input ports of lower layers of line rotation modules; the matrix data to be composed are input from an input port of the first layer of line rotation module, and sequentially flow through all the line rotation modules; and all the line rotation modules work in parallel. The scalable QR decomposition method has the advantages that hardware resources are saved; and as the iterative process of the CORDIC algorithm is split at the inner part of each layer of the data processing module, a pipeline structure is formed, the rotation operation of multiple vector groups is processed in a time sharing manner, the throughput rate is increased, and the extension is flexible.
Owner:TSINGHUA UNIV

Channel simulator and modeling method thereof

The invention provides a channel simulator and a modeling method thereof. An SCM (space channel molding) method is used for processing large-scale fading and medium-scale fading, and correlation parameters of the large-scale fading and medium-scale fading are configured according to the selected specific scene and converted into corresponding weight constant; a small-scale fading mathematical model is expanded in accordance with the Euler's formula, the frequency shift of each path of the expanded small-scale fading mathematical model is determined by combining a given maximum frequency shift and based on a random number generation scheme of the Box-Muller algorithm, and the sine and cosine functions of the expanded small-scale fading mathematical model are calculated through the PAR-CORDIC (Coordinate Rotational Digital Computer) algorithm; Gaussian white noise is generated based on the Box-Muller algorithm; Finally, the weight constant of the large-scale fading and medium-scale fading is used for weighting the small-scale fading mathematical model and then added to the Gaussian white noise to obtain a channel simulator model. According to the channel simulator and the modeling method thereof, the modeling is quick and efficient and has the performance advantages on resource consumption, processing time and the like.
Owner:CHONGQING UNIV OF POSTS & TELECOMM
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