A reconfigurable floating-point arithmetic device based on
CORDIC algorithm comprises a preprocessing module for completing input data from IEEE-754 standard, and maps it into the convergence region;a series-parallel
hybrid reconfigurable
CORDIC iterative unit module. The iterative operation part of
CORDIC algorithm is composed of two parts: rotation modules A and B, wherein, the rotation moduleA is used to realize serial pipeline structure to maximize module reuse, the rotation module B is based on parallel prediction method of rotation direction and adopts tree
adder structure to realize parallel structure in rotation mode; in the post-
processing module, the corresponding result output is selected according to the encoded
signal of the pre-
processing module, and the mantissa normalization
processing is completed to output the single-precision floating-
point data format calculation result. The invention has the characteristics of simple principle,
low delay, high precision and low hardware cost.