Disclosed is a high-speed information interaction
system based on an FPGA-CPU mixed architecture. The
system comprises an FPGA module, a central control module and an interaction terminal, wherein the FPGA module is in data communication with the central control module through a PCIe interface, the central control module receives multi-path TCP demand data for external selection, stores historical demand data and generates and maintain a historical data pricing table; the FPGA manages and maintains a real-
time data pricing table generated according to the real-time demand data, the historical data pricing table and the real-
time data pricing table are called according to the trigger of the interaction terminal to execute corresponding operation instructions to conduct quick decision-making and order combination, an interaction instruction is generated, and information interaction is achieved through the interaction terminal; the content of the real-
time data pricing table is sorted through the adoption of a hardware bitonic sorting method, and the content of the historical data pricing table is sorted through the adoption of a balanced tree method. According to the high-speed information interaction
system based on the FPGA-CPU mixed architecture, the
delay of interaction between the FPGA and the CPU is controlled within a better
delay range, a flexible and effective communication mode is adopted, the respective
processing characteristics of the FPGA and the CPU take effects, and the
speedup ratio of the mixed architecture system is increased.