10427 results about "Sampling circuits" patented technology

A multi-stage speech recognition system includes an audio transducer that detects a speech signal, and a sampling circuit that converts the transducer output into a digital speech signal. A spectral analysis circuit identifies a portion of the speech signal corresponding to a first class and a second class. The system includes memory storage or a database having a first and a second vocabulary list. A recognition circuit recognizes the first class based on the first vocabulary list to obtain a first recognition result. A matching circuit restricts a vocabulary list based on the first recognition result, and a recognizing circuit recognizes the second class based on the restricted vocabulary list, to obtain a second recognition result.

Imager arrays, array camera modules, and array cameras in accordance with embodiments of the invention utilize pixel apertures to control the amount of aliasing present in captured images of a scene. One embodiment includes a plurality of focal planes, control circuitry configured to control the capture of image information by the pixels within the focal planes, and sampling circuitry configured to convert pixel outputs into digital pixel data. In addition, the pixels in the plurality of focal planes include a pixel stack including a microlens and an active area, where light incident on the surface of the microlens is focused onto the active area by the microlens and the active area samples the incident light to capture image information, and the pixel stack defines a pixel area and includes a pixel aperture, where the size of the pixel apertures is smaller than the pixel area.

A motor control system for a brushless and sensorless DC motor for driving a compressor, pump or other application, includes a protection and fault detection circuit for detecting a locked rotor and a rotor which has stopped because of lost rotor phase lock. The motor control system also includes an off-the-shelf motor control integrated circuit having an input for disabling power outputs to the motor phase coils. The protection and fault detection circuit uses a back EMF sampling circuit coupled to the motor phase coils and momentarily disables power to the motor phase coils, via the motor control integrated circuit input, to determine if the motor rotor is rotating. The system also monitors supply voltage, supply current, temperature, and motor speed limits to detect faults and protect system components.

A motor control system for a brushless and sensorless DC motor for driving a compressor, pump or other application, includes a protection and fault detection circuit for detecting a locked rotor and a rotor which has stopped because of lost rotor phase lock. The motor control system also includes an off-the-shelf motor control integrated circuit having an input for disabling power outputs to the motor phase coils. The protection and fault detection circuit uses a back EMF sampling circuit coupled to the motor phase coils and momentarily disables power to the motor phase coils, via the motor control integrated circuit input, to determine if the motor rotor is rotating. The system also monitors supply voltage, supply current, temperature, and motor speed limits to detect faults and protect system components.

A secondary side post regulator arrangement for a plurality of LED strings. For each secondary winding, a first electronically controlled switch is provided arranged to control the power output, and a LED string is connected thereto. A second electronically controlled switch is further connected in series with the LED string, arranged to receive a PWM signal, thereby pulsing current through the LED string. A current sensing element is further provided outputting a voltage representation of the current through the LED string, and a synchronized sampling circuit is provided arranged to sample the voltage representation during the on period of the second electronically controlled switch. The sampled and held voltage representation is compared with a reference signal and fed back to control the first electronically controlled switch. The voltage output associated with each secondary winding is controlled, responsive to the reference voltage.

An AC-to-DC voltage converter as power supply for lamp converts an AC input voltage to a constant DC voltage at predetermined value set by potentiometer. The converter includes input power supply 210, input protection circuit 201, EMI filter 202, rectifier 203, filter 204, converter 206, output filter 214, lamp 211, start circuit 208, control circuit 209, biasing circuit 212, sampling circuit 207, output protection circuit 200, feedback and dimming circuit 205 and input monitor circuit 213. This version is a flyback converter; versions from other topologies etc are also provided. The converter has feedback function that can regulate output voltage at predetermined value. The converter has dimming function and can adjust lamp brightness for conformability. The output constant brightness decreases peoples' eyes fatigue to minimum level.

Control systems and methods for independent control of power systems, particularly lighting network branches, and separate control of individual branch components. Multi-branch systems comprise independently controllable branches that inter-communicate via PLC communications. In each branch, components such as ballasts, local control units, sensors, actuators, and repeaters, may exchange commands and queries independently of a branch remote control unit (BRCU). Alternatively, a BRCU may manage or arbitrate communications, or interact with other BRCUs, other control units and external management systems. Ballasts include a multi-channel ballast that enables close-loop control of individual fixtures, or of individual dimmable or non-dimmable lamps within a fixture. The close-loop control is facilitated by sampling circuits / sensors co-located with each controlled fixture or lamp. All controllers are preferably implemented using an integrated digital controller. The PLC communication is preferably carried out by a direct spread spectrum method that eliminates side lobes from a cross-correlation function, using an anti-collision protocol.

The invention relates to a super capacitor energy storage type power quality compensator. A system structure comprises a compensation transformer, a series compensator, a parallel compensator, a super capacitor group, a current foldback circuit, a bidirectional DC / DC chopper circuit, a signal sampling circuit, a control circuit, a drive circuit, a human-computer interface and corresponding auxiliary circuits, which form a three-phase three-wire system topological structure. By utilizing the excellent characteristics of great power density, high charging and discharging speed and long cycle life of a super capacitor, the super capacitor energy storage type power quality compensator is matched with the DC / DC chopper circuit to form an energy storage control system which plays the roles of adjusting power and stabilizing the voltage of a direct current bus in work. The invention also has the functions of dynamic voltage recovery, active filter and reactive compensation and can ensure that a load can obtain rated sine voltage and the current of a grid is sine current with the same direction (unit power factor) with that of a voltage fundamental wave positive sequence active component, thereby comprehensively improving the quality of power. The invention has positive generalization and application value for both the public grid and users.

The invention provides an intelligent controller used for a direct current (DC) frequency-conversion air conditioner compressor and a technical proposal of the control method thereof; the hardware proposal comprises a rectifier filter circuit and a power module which are electrically connected sequentially; the rectifier filter circuit (220) is also electrically connected with a single DSP controller used as a core processing unit by a switch power supply (240); the single DSP controller is also respectively and electrically connected with the power module, a communication isolation circuit which is used for communicating with the indoor machine of the air conditioner, a fan driving circuit (280), and a temperature sampling circuit (270); the control method comprises the steps as follows:the control software is embedded in the DSP controller; by a control type of dual close-ring FOC no-sensor magnetic field vector, the current ring at the internal ring realizes the decoupling controlto the driving current of the permanent magnetic synchronous motor of a compressor and indirectly controls the output torque of the motor; the speed ring at the external ring is used for controlling the working frequency of the compressor, thus not only meeting the stable requirement during fixed frequency but also meeting the dynamic response during the frequency conversion; and the control software comprises a primitive recursive function and a main interrupt function.

A linear-predict sampling circuit is developed to generate a feedback signal by detecting a demagnetized voltage of the transformer. A switching signal is generated in response to the feedback signal for regulating the output of the power converter. A signal-generation circuit is used to generate a sample signal in response to a first signal, a second signal, and the switching signal. The first signal is correlated to a magnetized voltage of the transformer. The second signal is correlated to the demagnetized voltage of the transformer. A sample-and-hold circuit is coupled to the transformer to generate the feedback signal by sampling the demagnetized voltage of the transformer in response to the sample signal. The feedback signal is correlated to the output voltage of the power converter.

Array cameras incorporating quantum film imagers are disclosed. One embodiment includes: a plurality of focal planes, where each focal plane comprises a plurality of rows of pixels that also form a plurality of columns of pixels and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane; at least one quantum film located on the surface of the imager array, where each quantum film comprises a plurality of quantum dots; control circuitry configured to control the capture of image information by the pixels within the focal planes, where the control circuitry is configured so that the capture of image information by the pixels in at least two of the focal planes is separately controllable; and sampling circuitry configured to convert pixel outputs into digital pixel data.

A smart electricity meter with a function of monitoring and protecting power failure comprises a metering chip, a leakage current sampling circuit, a phase current sampling circuit, a phase voltage sampling circuit, a CPU (central processing unit), a power module and a low voltage breaker. The leakage current sampling circuit is electrically connected with the metering chip which is mutually electrically connected with the CPU. The CPU is electrically connected with the low voltage breaker through a trip output port. The low voltage breaker is electrically connected with the CPU through a status acquisition interface. The invention further provides a power failure monitoring and controlling method of the smart electricity meter. The smart electricity meter has the advantages that the reliable power module for power failure protection and control is provided, various types of power failure warning and protection are provided, failure warning and failure protection for voltage, current, power and the like are achieved for power users, failure spots are prevented and isolated, economic loss and personal safety accidents due to failure of electric circuit equipment of the users are prevented and reduced, and reliability of low voltage grids is effectively improved.

A circuit for adjusting the phase of a clock signal. A first sampling circuit generates a sequence of data samples in response to transitions of the clock signal, each of the data samples having either a first state or a second state according to whether an incoming signal exceeds a first threshold. An second sampling circuit generates an error sample in response to one of the transitions of the clock signal, the error sample having either the first state or the second state according to whether the incoming signal exceeds a second threshold. A phase adjust circuit adjusts the phase of the clock signal if the sequence of data samples matches a predetermined pattern and based, at least in part, on whether the error sample has the first state or the second state.

There is provided an imaging unit: including an image sensor with a number of pixels arranged in a matrix, the pixels having color pixels where color filters are disposed, and white pixels where the color filters are not disposed; a sampling circuit section for sampling pixel signals generated in the image sensor; and a main controller for controlling the image sensor and / or the sampling circuit section to sample the pixel signals generated in the white pixels or the pixel signals generated in the color pixels sequentially in a time-series manner.

Imager arrays, array camera modules, and array cameras in accordance with embodiments of the invention utilize pixel apertures to control the amount of aliasing present in captured images of a scene. One embodiment includes a plurality of focal planes, control circuitry configured to control the capture of image information by the pixels within the focal planes, and sampling circuitry configured to convert pixel outputs into digital pixel data. In addition, the pixels in the plurality of focal planes include a pixel stack including a microlens and an active area, where light incident on the surface of the microlens is focused onto the active area by the microlens and the active area samples the incident light to capture image information, and the pixel stack defines a pixel area and includes a pixel aperture, where the size of the pixel apertures is smaller than the pixel area.

A capacitive touch panel capable of reducing a disturbance noise and reducing touch detection time with a simple structure is obtained. The capacitive touch panel includes: a plurality of drive electrodes each to which a drive signal for touch detection is applied; a plurality of touch detection electrodes arranged to intersect the plurality of drive electrodes, and each outputting a detection signal synchronized with the drive signal; a first sampling circuit (A / D conversion circuits 72 and 73) extracting a first series of sampling signal including a signal component with first level and a noise component, from the detection signal; a second sampling circuit (A / D conversion circuits 75 and 76) extracting a second series of sampling signal including a signal component with second level different from the first level and the noise component, from the detection signal; a filter circuit (digital LPFs 81 and 82) performing a high range cut process on the first series of sampling signal and the second series of sampling signal; and a computation circuit (a subtraction circuit 90) determining a signal for touch detection based on an output of the filter circuit.

A device for detecting a demodulated signal received by a spread spectrum receiver and converted into digital samples. The device is characterized by a matched filter for calculating the correlation between an incoming signal and at least one reference signal, an oscillator for generating a sampling frequency, and a sampling circuit for re-sampling the demodulated digital sample signal at the sampling frequency, which is such that the timing of samples of the references signals of the matched filter corresponds to the timing of a sample signal going from the sampling circuit to the matched filter. The device also includes a multiplier in which the sample signal is multiplied by a carrier replica generated locally before the sampling circuit or thereafter, to remove the carrier from the sample signal.

A phase lock loop (PLL) for controlling a sampling clock or other clock, and a data sampling circuit, transceiver, or other device including such a PLL. The PLL includes a multi-range VCO, at least one fine control loop for controlling the VCO, and a coarse control loop for controlling the VCO by changing its frequency-voltage characteristic. The coarse control loop includes a frequency lock detector and voltage range monitoring logic. Typically, the frequency lock detector locks operation of the coarse control loop when the difference between the VCO output clock frequency and a reference frequency decreases to within a predetermined threshold, and the unlocked coarse control loop employs the voltage range monitoring logic to change the VCO frequency-voltage characteristic when the VCO's fine control voltage leaves a predetermined range. Other aspects are a transceiver (including at least two receiver interfaces and a transmitter interface) implementing a clocking scheme employing no more than three PLLs for clock generation, and a transceiver having a multi-layered receiver interface including digital circuitry and a single clock-generating PLL (an analog PLL for generating a multiphase clock to be shared by all layers of the receiver interface). Each receiver interface layer performs blind oversampling on a different received signal using the multiphase clock and the digital circuitry includes multilayered digital phase lock loop circuitry which receives the oversampled data.

A power converter used in the current control circuit and control method, consisting of a converter, a voltage divider circuit, a current sampling circuit, a first gain circuit, a differential amplifier, a second gain circuit, a multiplier, a saw tooth wave generator, a modulation comparator, and a driver. The invention samples inductor current through the current sampling circuit and generates the current sense signal, then processes again. With the differential amplifier, it compares the feedback voltage from the voltage divider circuit with the reference voltage, and the results along a modulation comparator output a drive signal to control the duty cycle in order to avoid the generation of inrush current. The present invention avoids inrush current caused by the large drive signal and achieves a good response rate and better system stability.

A signal line driving circuit which includes a digital signal sampling circuit, a storage circuit, a time setting circuit and a constant current circuit, is fabricated of TFTs on an insulating substrate which is made of the same substance as that of a pixel portion substrate. Thus, in a passive type EL display device, the problem of a distortion in the case of bonding the signal line driving circuit onto the pixel portion substrate can be eliminated. Besides, in an active type EL display device, each pixel is constructed of one transistor and an EL element. Thus, the aperture factor of the EL display device is enlarged.

The invention discloses a matching device and matching method for an ultrasonic power supply. The matching device for the ultrasonic power supply comprises an ultrasonic signal generator, a drive isolation circuit, an ultrasonic power amplification circuit, a matching transformer, a tuning inductor, an ultrasonic transducer, a voltage sampling circuit, a current sampling circuit, a filtering and shaping circuit, a phase discriminator, an A / D converter, a single-chip microcomputer and a stepping motor. The output end of the matching transformer is connected with the tuning inductor; the output end of the tuning inductor is connected with the ultrasonic transducer; the voltage sampling circuit is used for collecting real-time working voltage signals at the two ends of a unit formed by the tuning inductor and the ultrasonic transducer, and transmitting the real-time working voltage signals to the phase discriminator. According to the matching device and matching method for the ultrasonic power supply, static impedance matching and dynamic impedance matching can be achieved, the matching inductance value can be tracked and adjusted through the phase difference of working currents and working voltages of the ultrasonic transducer, it can be ensured that the ultrasonic transducer always works at a resonance point, the maximum useful power output of the ultrasonic transducer can be achieved, in addition, the adjusting response speed is high, and accuracy is high.

A high-speed data receiving circuit allowing correct and reliable data reception without the need for adjusting delays in circuits and interconnections is disclosed. A sampling circuit samples received data according to first, second, and third clock signals to produce first, second, and third streams of data. The first, second, and third clock signals sequentially have a predetermined phase difference between adjacent ones. A clock generator generates the first, second, and third clock signals having phases determined depending on a clock selection signal obtained by comparing the first, second, and third streams of data. The second clock signal is selected as an output clock signal and the second stream of data corresponding to said second clock signal is selected as an output data of the high-speed data receiving circuit.

A bandpass SIGMADELTA ADC utilizing either a single-loop or a MASH architecture wherein the resonators are implemented as either a delay cell resonator, a delay cell based resonator, a Forward-Euler resonator, a two-path interleaved resonator, or a four-path interleaved resonator. The resonator can be synthesized with analog circuit techniques such as active-RC, gm-C, MOSFET-C, switched capacitor, or switched current. The switched capacitor or switched current circuits can be designed using single-sampling, double-sampling, or multi-sampling circuits. The non-stringent requirement of a SIGMADELTA ADC using switched capacitor circuits allows the ADC to be implemented in a CMOS process to minimize cost and reduce power consumption. Double-sampling circuits provide improved matching and improved tolerance to sampling clock jitter. In particular, a bandpass MASH 4-4 SIGMADELTA ADC provides a simulated signal-to-noise ratio of 85 dB at an oversampling ratio of 32 for a CDMA application. The bandpass SIGMADELTA ADC can also be used in conjunction with undersampling to provide a frequency downconversion.

Method and apparatus for processing transmitted data. A sampling circuit preferably performs lossy sampling of a continuous signal to provide a corresponding sequence of discrete samples at a sampling rate less than a Nyquist rate of the continuous signal. A processing circuit reconstructs an informational content of the continuous signal from the discrete samples, and operates to periodically insert additional samples into the sequence, which preferably increases an effective rate of said sampling to match or exceed the Nyquist rate. Preferably, the lossy discrete samples are temporarily stored in a memory space prior to reconstruction by the processing circuit. The sampling circuit preferably comprises an analog-to-digital converter (ADC) of an analog front end (AFE). The processing circuit preferably comprises a digital back end (DBE) employing partial-response, maximum-likelihood (PRML) detection. The additional samples are preferably provided by an iterative timing recovery (ITR) block of the DBE.

The present invention provides apparatuses and computer readable media for obtaining information about a heating, ventilating, and air conditioning (HVAC) system and sending the information to a remote networked device. A control circuit deactivates loads of a HVAC system so that a sampling circuit can inject a test signal into the loads. Based on a resulting signal, a processor determines what loads are connected to a thermostat. The processor can consequently determine the type of the HVAC system. The processor may further utilize a lookup table that maps possible values of the resulting signal with different types of HVAC systems. The thermostat may consequently send information about the load configuration to a networked device. The thermostat may further detect a change of the load configuration and notify the networked device and may periodically inject the test signal into the connected loads when the control relays are deactivated.

A magnetic field sensing device for determining the strength of a magnetic field, includes four magnetic tunnel junction elements or element arrays (100) configured as a bridge (200). A current source is coupled to a current line (116) disposed near each of the four magnetic tunnel junction elements (100) for selectively supplying temporally spaced first and second currents. Sampling circuitry (412, 414) coupled to the current source samples the bridge output during the first and second currents and determines the value of the magnetic field from the difference of the first and second values. A method for sensing the magnetic field includes supplying a first current to the current line (116), supplying a second current the current line (116), sampling the value at the output for each of the first and second currents, determining the difference between the sampled values during each of the first and second currents, and determining a measured magnetic field based on the determined difference.

A data acquisition system includes a charge-sensitive amplifier (CSA) configured to receive a charge from an x-ray detector, the CSA includes a high-gain electronic voltage amplifier, an electrical energy storage device coupled with the amplifier, and an electrical resistor coupled with the amplifier. The data acquisition system includes a baseline sampling circuit configured to receive an output from the CSA and to sample a baseline signal from the CSA, at least one discriminator coupled to an output of the CSA and to an output of the baseline sampling circuit, the at least one discriminator configured to output a voltage if the output of the CSA exceeds a threshold, and a counter coupled to an output of the discriminator and configured to output a digital signal indicative of a photon count received at the x-ray detector and based on the output from the CSA and on the signal from the CSA.

A stepped dimming ballast comprising a filter and rectifier circuit (1), a DC high voltage stabilizing circuit (2), a frequency control and switch circuit (3), a load current feedback circuit (5), a voltage signal processing circuit (6) and a voltage signal sampling circuit (7). The present invention is adapted for use in conjunction with a silicon controlled rectifier dimmer and / or a regular light switch whereby it is novel in structure and able to effect dimming in two predetermined and reliable operation modes.

A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.