45 results about "Internal integration" patented technology

The invention discloses a timing simulation system and method. The timing simulation system is applied to the simulation of an internal integration circuit and comprises a processing unit, a first communication unit, a second communication unit, a signal transmission unit and a power supply. According to the invention, a high-impedance load is arranged on an I2C bus and then is connected to the power supply and the timing of an I2C is simulated by using software, thus the problem of I2C electric leakage can be improved, and the consumption of power is reduced.

The cloud-based multi-smart terminal shared face concealment recognition method proposed by the present invention can be performed under a safe protocol, and at the same time can simultaneously protect the privacy of user image data and the privacy of a third-party face detector. The present invention applies the secure inner product algorithm to secure face detection in the cloud environment for the first time, which not only realizes the ciphertext storage of user images, but also provides the function of querying the required images in the ciphertext state, and also ensures that third parties The face detector is not leaked. In addition, since the form of user image storage is encrypted with a standard encryption algorithm, the reliability of data security can be guaranteed, and the secure inner product algorithm is used for each query, and the complexity of the algorithm is related to the selected encryption matrix dimension. The complexity is low and can be flexibly configured according to computing power and security requirements. The amount of local calculation is small, and a large number of calculations are processed by the cloud with powerful computing power, which effectively shortens the detection time. And the encryption method is easy to realize by software, and the present invention can be widely applied to cloud computing, face recognition and the like.

The invention discloses a flyback topology structure circuit employing primary side control. An integrating circuit is connected with a peak value current comparator; the peak value current comparator is connected with an inductor energy storage circuit; the output end of the bridge type rectification circuit of the inductor energy storage circuit is connected with a first primary side of a transformer; the other end of the first primary side is connected with the source electrode of an N type field effect transistor; one end of the second primary side of the transformer is grounded; the other end of the second primary side of the transformer is connected in series with a resistor R1 and a resistor R2; the common end of the resistor R1 and the resistor R2 is connected with the peak value current comparator; the gate electrode and the drain electrode of the N type field effect transistor are connected with the peak value comparator; the drain electrode of the N type field effect transistor is connected with the ground through a resistor R3; one end of the secondary side of the transformer is grounded, and the other end of the secondary side of the transformer is connected with the anode of a diode D5; and a capacitor is connected between the grounding end of the secondary side and the cathode of the diode D5. The advantages are as follows: the design of the circuit can be applied to internal integration of a chip and is free from periphery chip parameters, and development difficulty is lowered.

The present invention proposes a device for improving channel isolation of a radio frequency switch matrix, which is characterized in that it includes: a general interface unit, a control unit, a drive unit, a cross-point matrix array unit, a row isolation array unit 1, a row isolation array unit 2, Column isolation array unit 1, column isolation array unit 2; the main control computer sends the channel control code to the control unit through the general interface unit, the control unit decodes the address and sends it to the drive unit, and the drive unit receives the code according to the different codes sent. Switching on or off the switches in the cross-point matrix array unit and row isolation array unit 1, row isolation array unit 2, column isolation array unit 1, and column isolation array unit 2 realizes the control of the corresponding radio frequency switch matrix channel. The invention is easy to operate and has strong versatility; the index of radio frequency path isolation is high; it is convenient for maintenance; the whole device has high internal integration and small volume, and is convenient for the integration of an automatic test system.

The invention discloses a tower drum internal integration truss device. The device is characterized by comprising a truss of a square structure, a cable bridge arranged on the outer side of the truss, a ladder stand arranged on the inner side of the truss, an elevator arranged in the truss and an illuminating system arranged on the outer wall of the truss, wherein the truss is composed of multiple sections of truss bodies, the number of the truss bodies is the same as the number of segments of a tower drum, the height of each section of one truss body is the same as that of the corresponding segment of the tower drum, each upper truss body and the corresponding lower truss body are connected through a guiding device, and each section of each truss body is fixed to the inner wall of the tower drum through a connecting device. The device has the advantages of being reasonable in structural design, quick and convenient to install and high in strength; meanwhile, the cable bridge and the illuminating system are fixed to the outer side of the truss, so that easily damaged parts in the tower drum are gathered within a manipulative range of the center of the truss, follow-up maintenance is facilitated, and maintenance cost is reduced.

The invention discloses a circuit oscillation device for clock signal generation and control. The device takes a control and bias circuit module as the core, and its signal output terminal is connected with a reference generation circuit module; its signal output end is also connected with an oscillation generation circuit module and a clock output circuit module; the output of the reference generation circuit module is also connected to an oscillation generation circuit module and a clock output circuit module; a modular design is adopted, which has a simple structure, low power consumption, and reusability, and can be used in the chip Internally integrated, it can generate and control the clock signal, and it also has the advantages of cost saving, improved circuit integration, stability and reliability; the oscillator circuit can generate 460.8kHz clock, support chip selection effective function, and can support external clock directly Input and / or use an externally connected crystal to generate a clock with the advantage of two modes of operation.