51results about How to "Save current" patented technology

A method for power saving in an ad hoc wireless computer network determines an optimal ATIM message exchange window. The method (a) determines an effective number of nodes that participate in exchanges of ATIM messages during an ATIM window; (b) using the effective number of nodes, calculating a length for a data frame transmission window; and (c) calculates a length for the ATIM window using the calculated data frame transmission window. In one instance, the method determines the effective number of nodes based on the number of senders of ATIM messages. In another instance, the effective number of nodes is determined based on both senders and recipients of the ATIM messages. The method may determine the effective number of nodes from a number of successful ATIM message transmissions in a given time period. The calculated ATIM window size can be provided as an initial value to other methods that dynamically adjust the ATIM window size.

A method is proposed for signal processing with predistortion. An amplifier circuit is provided for this purpose, whose operating states are characterized by at least one characteristic variable. A digital modulation signal having two components (R, φ), as well as a power word (LS), derived from the first component (R), are produced, and an operating state of the at least one amplifier circuit is then determined by recording of the characteristic variable. The power word (LS) is compared with the reference value and used to decide whether to predistort the first and / or the second component. A table with various predistortion coefficients is selected from at least two tables, depending on the operating state of the amplifier circuit. One predistortion coefficient is then determined from the selected table with the produced power word (LS) and the first component (R), and the predistortion coefficient is used for predistortion.

A method and system for reducing self-refresh current requirements in a includes a DRAM chip that is sectioned into a number of segments. The entire DRAM chip is tested upon manufacture to determine the relative decay rates for each cell in the DRAM. For each segment, the refresh rate for that segment is selected based on the fastest decay rate for a DRAM cell in the segment. The DRAM is configured for refreshing memory cells during a self-refresh at different refresh rates for different segments. The refresh period is controlled for individual segments using techniques, such as programmable logic or fuses, to skip certain self-refresh cycles for those segments capable of operating at lower refresh rates. The refresh period in memory segments with strong memory cells can be reduced, thereby conserving current required to be drawn.

A reduced-frequency, 50% duty cycle corrector (DCC) circuit may be used in an electronic device (e.g., a memory chip) to generate output clocks with 50% duty cycle irrespective of the duty cycle of the clock input to the DCC circuit. A DCC initialization scheme selectively activates the frequency division and edge detection operations in the DCC based on the lock status of the DCC during initialization. Upon initialization, the frequency division and edge detection operations are turned off or disabled. After the DCC is properly locked, these operations are enabled to obtain the 50% duty cycle output clock. This approach initializes the reduced-frequency DCC without output glitches, which can affect locking of a DLL with which the DCC may be used. The prevention of instability in locking of the DCC and DLL upon system initialization results in swift establishment of DCC and DLL locks without significant power consumption or loss of clock cycles. Once the DCC is locked during its initialization, the reduced-frequency operation of DCC further saves current consumption. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

A power-on-reset (POR) circuit may comprise a first circuit powered by a first supply voltage and configured to generate a second supply voltage based on the first supply voltage, the second supply voltage having a nominal value lower than a nominal value of the first supply voltage. The POR circuit may also include a second circuit powered by the second supply voltage and configured to generate a POR signal. The second circuit may be configured to assert the POR signal when the second supply voltage reaches a value that is sufficiently high for the second circuit to become operational, keep the POR signal asserted until the first supply voltage reaches a second value that is higher than the nominal value of the second supply voltage by a specified difference voltage value, and deassert the POR signal once the first supply voltage reaches the second value.

A reduced-frequency, 50% duty cycle corrector (DCC) circuit may be used in an electronic device (e.g., a memory chip) to generate output clocks with 50% duty cycle irrespective of the duty cycle of the clock input to the DCC circuit. A DCC initialization scheme selectively activates the frequency division and edge detection operations in the DCC based on the lock status of the DCC during initialization. Upon initialization, the frequency division and edge detection operations are turned off or disabled. After the DCC is properly locked, these operations are enabled to obtain the 50% duty cycle output clock. This approach initializes the reduced-frequency DCC without output glitches, which can affect locking of a DLL with which the DCC may be used. The prevention of instability in locking of the DCC and DLL upon system initialization results in swift establishment of DCC and DLL locks without significant power consumption or loss of clock cycles. Once the DCC is locked during its initialization, the reduced-frequency operation of DCC further saves current consumption. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

A light source sequentially emits lights generated by at least three light emitting elements each emitting a different primary color to generate an image. Each light emitting element has a duty cycle in a lighting period, which may be an image frame period. A sequence scheme is provided for alternatingly driving different ones of the light emitting elements. The light emitting elements are driven in accordance with the sequence scheme at least two times in the lighting period, while maintaining the duty cycle for each light emitting element. In the sequence scheme, at least one light emitting element having the highest temperature sensitivity of all light emitting elements is driven more times than another one.

In an embodiment, an LVDS (Low Voltage Differential Signaling) receiver includes at least one LVDS input buffer, a clock generating unit, and a bias circuit. The clock generating unit includes a voltage controlled oscillator for generating a clock signal tracking a frequency of data received via the at least one LVDS input buffer based on a control voltage. The bias circuit controls current sources that supply current to at least one differential amplifier in the at least one LVDS input buffer based on the control voltage of the clock signal generating unit. Therefore, the LVDS receiver can save current consumed in LVDS input buffers by controlling the amount of current supplied to the at least one differential amplifier included in the at least one LVDS input buffers.

The present invention discloses a method for implementing fast multicast and a system thereof. The system comprises multicast protocol, forwarding plane and fast multicast control plane, and the fast multicast control plane further comprises management module and agent module. The method comprises steps of: determining an edge node of time domain overlapping sub-tree of corresponding multicast tree in the multicast service according to the analysis of time domain; initiating the static multicast member of multicast service on said edge node, so that an interface at which the static multicast member is initiated generates a requirement for multicast service; generating the multicast overlapping sub-tree from said edge node to a multicast root node, so that the multicast service flow is transmitted to said edge node in advance; after sending out the requirement for the multicast service flow through any receiver at said edge node, multicast tree path establishes a multicast forwarding tree from the receiver to the edge node, the multicast service flow will be transmitted from this edge node to the receiver. The present invention can effectively reduce the delay of multicast application.

A receiver front end circuit includes a low-noise amplifier including: a first receiver path having: a first low-noise transconductor to amplify a received signal and output the amplified received signal; and a first mixer to down-convert the amplified received signal. A second receiver path includes: an auxiliary receiver having: a second transconductor to output an amplified received signal; a baseband amplifier having an input port and an output port; a first resistance coupling the input port to the output port of the baseband amplifier and to convert the amplified received signal from current to voltage and set a voltage gain of the second receiver path; and a second resistance coupled from the output port of the baseband amplifier to the first mixer output. In some examples, frequency-upconversion feedback path includes a third mixer to frequency up-convert the amplified received signal at an output of the second receiver path.

An electrical circuit contains volatile states that are lost without continued application of power to circuit elements to preserve their volatile states. A first power source in the circuit provides power to the volatile state circuit for holding and preserving their volatile states. A power selection circuit is coupled to the circuit elements and has a plurality of selectable modes. A first mode of operation of the power selection circuit is selected when the circuit elements are to be operated at a first power level via the first power source which constitutes a first mode of operation. A second mode of operation is selected when the volatile state circuit elements are to be operated under a condition where the first power source is inactivated, such as, for example, during a circuit backup or standby operation. During the second mode of operation, the circuit elements volatile states are preserved via a power selection circuit that provides power from a second power source at a second power level, different from the first power level, to the volatile state circuit elements in place of the first power source.

A fixed phase shift for each of a plurality of radio frequency signal components directed to or received from a plurality of antenna elements (100A, 100B) is formed in a phase shifter (102). A desired antenna beam pattern with at least one grating lobe is formed on the basis of the phase-shifted radio frequency signal components of the antenna elements (100A, 100B) in a predefined antenna structure.

A portable high power AC lighting comprises a body with an opening at the top thereof, a bulb holder disposed inside the opening, an AC bulb above the bulb holder, a light cover fixed above the opening for covering the AC bulb, and a control circuit board disposed therein for recharging and saving the direct currents rapidly and repeatedly in the series lithium battery pack to provide the AC power for the AC bulb by an AC supply unit, forming an AC lighting device of high-brightness with a 360° lighting angle that can be held and carried easily like a bright torch. Also, the present invention uses a standard AC LED / PL bulb which is common in households, making it much easier to replace the bulb when needed. Hence, the present invention has the problems in the prior art solved and provides a high power but energy saving lighting device for continuous usage.

A system and method for communicating between a controller and a device is provided: The controller communicates with the device over a communication link. The controller shutting off a power supply that is connected to the communication link, for example, due to inactivity parameters. The device generating a wake up signal and transmitting the wake up signal from the device to the controller while the power supply is shut off.

A method is proposed for signal processing with predistortion. An amplifier circuit is provided for this purpose, whose operating states are characterized by at least one characteristic variable. A digital modulation signal having two components (R, φ), as well as a power word (LS), derived from the first component (R), are produced, and an operating state of the at least one amplifier circuit is then determined by recording of the characteristic variable. The power word (LS) is compared with the reference value and used to decide whether to predistort the first and / or the second component. A table with various predistortion coefficients is selected from at least two tables, depending on the operating state of the amplifier circuit. One predistortion coefficient is then determined from the selected table with the produced power word (LS) and the first component (R), and the predistortion coefficient is used for predistortion.

In a method for ascertaining the phase currents of an electric machine having a power converter and a stator with a phase number of four or more, the phase currents of a measuring number of measuring phases is measured, which is at least two and is lower by at least two than the phase number, and the phase currents of the remaining phases are arithmetically determined from the measured phase currents, at least the measured phase currents, a spatial angle of the measuring phases and a spatial angle of the remaining phases being used for the arithmetical determination.

A safe and natural method to cure the fungal disease caused by the Taphrina deformans fungus known as peach leaf curl. This disease commonly effects and destroys the leaves and fruits of peach and nectarines trees. According to the present discovery, it has been found that Carvacrol, a constituent of the extracts derived from oregano and thyme plants, is an effective agent to eradicate peach leaf curl during the season of infection. Several (e.g., two or three) applications of an aqueous solution containing oregano oil or thyme oil (known commercially as Oil of Oregano and Oil of Thyme) has been found to cure the infected trees and save the current year's fruit crop for harvest.

A method for playing dynamic content includes: allocating and occupying playing resources for playing of dynamic contents by dynamic content priority; preempting playing resources occupied by dynamic contents of lower priorities to play back dynamic contents of higher priorities in precedence. The dynamic contents of which the playing resources are preempted can be handled as appropriate in accordance with the preset processing policy. A playing apparatus for playing dynamic content includes a content receiving module, a storage unit, a play scheduling module, a content playing module, and a user configuration module. The present invention supports automatic playing of dynamic contents by priority and in accordance with the policy preset by the user, and can be implemented simply and conveniently.

A content addressable memory (CAM) device (400) can sequentially apply command and key data to different sections (404-1 to 404-4). Within each section, CAM cores (402-11 to 402-44) can be sequentially activated. Current surges when transitioning from an idle state to an active state, or vice versa, can be significantly reduced with additional latency but no loss in throughput.

A voltage supply circuit includes a voltage generator and a controller. The voltage generator is configured to pump an externally input voltage and store the pumped external voltage as a first voltage having a set voltage level, before power-up begins, or pump the external voltage, add the pumped voltage to the stored voltage, and output the added voltage as an operating voltage. The controller is configured to output a first control signal to drive the voltage generator or stop operation of the voltage generator, according to an operating state.

A voltage supply circuit includes a voltage generator and a controller. The voltage generator is configured to pump an externally input voltage and store the pumped external voltage as a first voltage having a set voltage level, before power-up begins, or pump the external voltage, add the pumped voltage to the stored voltage, and output the added voltage as an operating voltage. The controller is configured to output a first control signal to drive the voltage generator or stop operation of the voltage generator, according to an operating state.

A cutting tool is provided having a marking feature to facilitate the cutting of materials at desired lengths. The tool includes a laser that provides a beam for marking the material at a determined length based on the angle that the beam forms with the cutting axis of the tool. The tool may be configured so that the beam can be emitted on either side of the tool. The tool may be reconfigured so that the angle of the beam relative to the cutting axis of the tool is selectively adjustable.

A fixed phase shift for each of a plurality of radio frequency signal components directed to or received from a plurality of antenna elements (100A, 100B) is formed in a phase shifter (102). A desired antenna beam pattern with at least one grating lobe is formed on the basis of the phase-shifted radio frequency signal components of the antenna elements (100A, 100B) in a predefined antenna structure.

A method and apparatus for saving current consumption in a standby state of a portable terminal are provided. The method includes performing a Received (Rx) power determination, and performing at least one function corresponding to a period of the Rx power determination.

A power-on-reset (POR) circuit may comprise a first circuit powered by a first supply voltage and configured to generate a second supply voltage based on the first supply voltage, the second supply voltage having a nominal value lower than a nominal value of the first supply voltage. The POR circuit may also include a second circuit powered by the second supply voltage and configured to generate a POR signal. The second circuit may be configured to assert the POR signal when the second supply voltage reaches a value that is sufficiently high for the second circuit to become operational, keep the POR signal asserted until the first supply voltage reaches a second value that is higher than the nominal value of the second supply voltage by a specified difference voltage value, and deassert the POR signal once the first supply voltage reaches the second value.

In an embodiment, an LVDS (Low Voltage Differential Signaling) receiver includes at least one LVDS input buffer, a clock generating unit, and a bias circuit. The clock generating unit includes a voltage controlled oscillator for generating a clock signal tracking a frequency of data received via the at least one LVDS input buffer based on a control voltage. The bias circuit controls current sources that supply current to at least one differential amplifier in the at least one LVDS input buffer based on the control voltage of the clock signal generating unit. Therefore, the LVDS receiver can save current consumed in LVDS input buffers by controlling the amount of current supplied to the at least one differential amplifier included in the at least one LVDS input buffers.

A voltage detector (200) for monitoring an input signal and outputting a detection signal at an output when a voltage of the input signal meets a first threshold having: an input configured for receiving the input signal; a voltage reference circuit for receiving an input voltage and producing a reference voltage having a maximum value independent of the input voltage; and a trigger configured to compare the input signal and the reference voltage and to output a detection signal to the output when the voltage of the input signal reaches the first threshold. The voltage reference circuit comprises a reset input connected to either the input or the output and is configured to reduce the reference voltage when a predetermined reset signal is received. The voltage reference circuit may include: an input for receiving the input voltage; a first current controlling element (210), such as a diode, which allows current to flow as an increasing, non-linear function of voltage at least within a first range of voltages; a second current controlling element (240), such as a transistor, which allows current to flow as an increasing, non-linear function of voltage at least with a second range of voltages; and an output at which the output reference voltage is produced. The first current controlling element and the second current controlling element are connected in series between the input and a common reference, with the second current controlling element between the first current controlling element and a common reference, the output comprises a node between the two current controlling elements, the first and second range of voltages overlap and the second current controlling element is configured to vary the function by which it allows current to flow in dependence on the input voltage.

The present invention provides a system and method for optimizing power consumption in mobile devices. The system comprises a speech codec encoder module and a speech codec decoder module. The number of CPU / DSP / VLIW processor cycles taken to encode and decode the speech signals are significantly reduced to draw lower current by the mobile device. The significant reduction of processor cycles in the speech codec modules enables reduction of power consumption in the talk time. Thus, the invention provides a simple method of optimizing power consumption by reducing number of processor cycles to compress / decompress speech signal of the speech codec modules in mobile devices.

A system and method for communicating between a controller and a device is provided: The controller communicates with the device over a communication link. The controller shutting off a power supply that is connected to the communication link, for example, due to inactivity parameters. The device generating a wake up signal and transmitting the wake up signal from the device to the controller while the power supply is shut off.

A memory circuit comprises a memory cell array with dynamic memory cells arranged on word lines and bit lines, a selection unit providing selection information and a refresh circuit selecting the memory cells in each case in dependence on the selection information and refreshing the selected memory cells so that any information stored therein is retained in each case.