The invention discloses a bus voltage stabilization control device. Firstly, high-end bus voltage and low-end bus voltage are respectively sampled by two bus voltage sensors; then, the sampling values are respectively transferred into a high-end bus voltage controller and a low-end bus voltage controller and are compared with the expected values; when the voltage sampling values are less than theexpected voltage values of the buses, the duty ratio of pulse width modulation signals is correspondingly reduced so that the output power of a half-bridge inverter circuit is reduced, and the storedenergy of a bus capacitor is increased, thus the voltage sampling values are increased until the voltage sampling values are equal to the expected voltage values of the buses; and the reverse is alsotrue. In the invention, by controlling corresponding output current values by the high-end bus voltage controller and the low-end bus voltage controller, the regulation of the bus voltage is realizedto enable the bus voltage to be in a stabilized state. Meanwhile, because the expected voltage values (Uref) of the buses in the high-end bus voltage controller and the low-end bus voltage controllerare same, the bus voltage is stabilized, and simultaneously, the balance of the high-end voltage and the low-end voltage of the buses is also realized.