77results about How to "Poor connection" patented technology

A stacked semiconductor module is made by stacking a second semiconductor device having a second semiconductor chip mounted to the top surface of a second semiconductor substrate above the top surface of a first semiconductor device having a first semiconductor chip mounted to a first semiconductor substrate. The top surface of the first semiconductor substrate is provided with a first connection terminal and the bottom surface of the first semiconductor substrate is provided with an external connection terminal. A region of the bottom surface of the second semiconductor substrate lying opposite to the second semiconductor chip is provided with a second connection terminal. A conductive connecting member connects the first connection terminal to the second connection terminal.

The invention relates to a battery pack with multiple parallel cells and a power supply assembly with multiple battery packs connected in series. The battery pack mainly comprises a fixed frame device, the cells, top common electrodes, bottom common electrodes and at least one conductive column, wherein the fixed frame device comprises a plurality of storage grooves, the cells are arranged in the storage grooves, and at least one storage groove is used for installing the conductive column; the top common electrodes and the bottom common electrodes are respectively in conductive contact with the cells and two ends and locked on the upper side surface and the lower side surface of the fixed frame device, the top common electrodes form an electrode, and the bottom common electrodes are conductively connected with one another through the conductive column, are insulated from the top common electrodes and form another electrode. The power supply assembly with high electric capacity is formed by connecting the electrodes of the multiple battery packs in series / parallel.

A liquid crystal display device comprising: a switching element that has a drain electrode and that is arranged on a substrate; a first insulating film that covers the switching element and that has a first opening on the drain electrode; a first etching stopper electrode that is formed in the first opening and that is connected to the drain electrode; a common electrode that is arranged on the first insulating film; a second insulating film that covers the first etching stopper electrode and the common electrode, and that has a second opening on the first etching stopper electrode; and a pixel electrode that is connected through the second opening to the first etching stopper electrode and that extends onto the second insulating film so as to face the common electrode.

A piezoelectric actuator includes a supporting member in which pressure chambers are formed, a vibration plate which is joined to a joining section of the supporting member, a piezoelectric layer formed on the vibration plate, and an FPC provided on the piezoelectric layer. A contact section of an electrode formed on the piezoelectric layer and a terminal section of the FPC are electrically connected via a bump formed on the terminal section. A recess is formed on an upper surface of the supporting member right below the bump. While joining the piezoelectric layer and a wire member, any damage of the piezoelectric layer and any poor connection do not occur.

The purpose is to provide a discharge system that adopts an optimal structure for connecting a discharging device to a refilling device in a substantially aligned fashion by moving the discharging device. A discharge system includes a discharging device, a refilling device, a discharge-side coupler, a refill-side coupler, and a manipulator. The discharge-side coupler is connectable to the refill-side coupler by relatively moving the discharge-side coupler in an axial line N direction of the refill-side coupler and fluid can be refilled from the refilling device side to the discharging device side. A coupling position between the manipulator and the discharging device reaches on the axial line N when connecting the refill-side coupler and the discharge-side coupler.

The present disclosure is directed generally to systems and methods for changing an application layer transaction timeout to prevent Denial of Service attacks. A device intermediary to a client and a server may receive, via a transport layer connection between the device and the client, a packet of an application layer transaction. The device may increment an attack counter for the transport layer connection by a first predetermined amount responsive to a size of the packet being less than a predetermined fraction of a maximum segment size for the transport layer connection. The device may increment the attack counter by a second predetermined amount responsive to an inter-packet-delay between the packet and a previous packet being more than a predetermined multiplier of a round trip time. The device may change a timeout for the application layer transaction responsive to comparing the attack counter to a predetermined threshold.

There is provided a socket which does not cause connection failure. A socket includes: a base (10); a connection fitting (20) including a bracket (21) and a spring member (30), configured to form pressure springs (35) by dividing the spring member (30) into two in a width direction by a slit (28,34) provided to the spring member (30), and assembled to an upper surface (11) of the base (10); and a case cover (40) configured to fit to the base (10) and to cover the connection fitting (20). The pressure springs (35) of the spring member (30) are pressed and elastically deformed by an operation driver (50) inserted through an operation hole (44) provided to the case cover (40), to sandwich between the bracket (21) and the pressure springs (35) a lead inserted through an insertion hole (45) provided to the case cover (40). Particularly, a guide partition wall (47) configured to engage with the slit (28,34) of the spring member (30) is integrally molded with an inner surface of the case cover (40).

A semiconductor encapsulation adhesive composition comprising (a) an epoxy resin, (b) a curing agent and (c) an antioxidant.

A charged-particle beam lens includes a plate-like anode, a plate-like cathode, and an insulator disposed between the anode and the cathode. The insulator, the anode, and the cathode have a passage portion through which a charged beam is passed. A high-resistance film is formed on an inner side of the insulator, the inner side forming the passage portion, or an outermost side of insulator, and the anode and the cathode are electrically connected together via the high-resistance film. The anode and the high-resistance film, and the cathode and the high-resistance film each contain the same metal or semiconductor element and have different resistant values. This suppresses electric field concentration due to an increase in resistance and poor connection at the interface between the anode and the cathode and the high-resistance film or at the interface between the electroconductive film and the high-resistance film, thus suppressing generation of discharge.

The invention provides a semiconductor packaging method, a semiconductor packaging structure and a packaging body. The packaging method comprises the following steps: providing a substrate wafer provided with a first surface and a second surface, wherein the first surface and the second surface are opposite to each other, a plurality of grooves are formed in the first surface, a plurality of conductive columns are arranged at the bottoms of the grooves, and the conductive column penetrates through the bottom of the groove to the second surface; providing a plurality of semiconductor bare chip stacks; placing the semiconductor bare chip stacks in the groove, wherein the upper surface of the semiconductor bare chip stack is lower than or flush with the upper edge of the groove, and the bottom of the semiconductor bare chip stack is electrically connected with the conductive columns; and filling a gap between the side wall of the groove and the semiconductor bare chip stack with an insulating medium to form an insulating medium layer, and covering the upper surface of the semiconductor bare chip stack with the insulating medium layer to seal the semiconductor bare chip stack so as to form the semiconductor packaging structure. The semiconductor packaging structure has the advantages that the formed semiconductor packaging structure is low in packaging height, high in stability, high in reliability and low in warping degree.