33 results about "Test graph" patented technology

The invention provides an adding method and an adding device for auxiliary graphs, a storage medium and a processor. The adding method comprises the following steps: determining test graphs accordingto prefabricated graphs, wherein the test graphs comprise main body graphs and auxiliary graphs, and the auxiliary graphs are obtained through a model calculation method; and extracting the adding rules of the auxiliary graphs according to at least a part of the test graphs. The accuracy of the auxiliary graphs obtained by the method is extremely high, so that the test graphs comprising the auxiliary graphs are also extremely accurate, and then adding rules according to the extraction of the test graphs are more accurate, and the auxiliary graphs added in prefabricated graphs by subsequently using these adding rules are more accurate. Moreover, the adding rules are added in the method, the auxiliary graphs can be added in the prefabricated graphs by subsequently using the adding rules, themethod is relatively quick in speed, convenient and simple, and the method meets double requirements on volume production, speed and precision.

The invention provides an adjusting method for minimum operating voltage of an SRAM (static random access memory), which can reach the optimal state. The SRAM receives voltage of a peripheral circuit and a memory unit. The adjusting method includes the following steps: first, a shmoo test is carried out on the SRAM to obtain a shmoo test graph and the minimum operating voltage; second, comparisonis carried out between the minimum operating voltage and a preset specification, and a specification positioning point of the preset specification is positioned on the line on the test graph that thevoltage of the peripheral circuit is equal to that of the memory unit; third, one of the voltage of the peripheral circuit or the memory unit is fixed, and the other voltage of the peripheral circuitor the memory unit is gradually lowered, so as to carry out the test on the SRAM and obtain the failure digit distribution; finally, processing parameters of the SRAM are adjusted according to the specification positioning point and the failure digit distribution.

The invention provides a graph selection method used for light source-mask optimization. The graph selection method comprises the steps of calculating power spectrum density of each feature graph in a plurality of feature graphs; calculating a difference degree between any two feature graphs in the feature graphs based on the calculated power spectrum density of each feature graph; and selecting the feature graphs with the difference degree greater than or equal to a predetermined threshold in the feature graphs as test graphs used for the light source-mask optimization. According to the graph selection method used for the light source-mask optimization, provided by the invention, the test graphs used for the light source-mask optimization can be efficiently and quickly selected, and any key graph is not omitted, so that efficient and high-accuracy light source-mask optimization is realized.

The invention discloses a method for detecting a bridging defect on a polysilicon bottom by using a small window graph detection structure, relating to the circuit manufacture technology field. The method comprising steps of establishing a small window graph test structure, placing the test structure on a monitor product test position of an electron beam detection instrument, depositing a mask layer on the surface of the small window test graph structure and tapping out according to the previous technology, utilizing the etching technology to etch on the small window graph test structure, utilizing the electron beam detection instrument to detect the etched small window graph test structure, determining that whether the polysilicon of the small window graph test structure has bridging, if yes, the defect of the small window graph test structure exists, if not , the defect of the small window graph test structure does not exist. The method provided by the invention can discover the defect promptly, can provide data reference for improving yield during the process of research and development, can shorten the research and development cycle, can provide monitor means for products, can shorten influence interval and can provide guarantee for the yield of products.

The invention discloses camera detecting equipment, which comprises a base, a support, a test graph fixing frame and a camera fixing bracket, wherein the support is arranged on the base and can move on the base along the Y-axis direction; the test graph fixing frame is used for fixing a test graph, arranged on the support and can move on the support in the Z-axis direction; the camera fixing bracket is arranged on the base; and a camera to be detected is arranged on the camera fixing bracket, so that the camera is opposite to the test graph arranged on the test graph fixing frame. The invention also discloses a camera detecting system. The equipment provided by the invention can be fixed on a worktable, and related test parts can be adjusted along a screw rod and are stable so as to assist a computer to detect and calculate the central offset and rotation angle of an image shot by the camera and meet the higher level requirement on the quality of the shot image.

The invention discloses a method for testing square resistance in an ohm contact area based on vertical test graphs. According to the implementation scheme, the method comprises the following steps: preparing a group of transverse and longitudinal vertically crossed ohm contact test graphs, wherein the transverse test graph comprises a first electrode, a fifth electrode and a fourth electrode, and the longitudinal test graph comprises a second electrode, a fifth electrode and a third electrode; 2, testing a resistance value between the first electrode and the fourth electrode as well as a resistance value between the second electrode and the third electrode in the transverse and longitudinal test graphs separately; and 3, multiplying the obtained resistance value of the longitudinal test graph by a coefficient L / W, performing subtraction with the obtained resistance value of the transverse test graph, and dividing a coefficient 1-L / W by the difference value to obtain the square resistance of the ohm contact area in the test graphs, wherein L and W are lengths of the fifth electrodes in the transverse and longitudinal test graphs. The test graphs are simple and easy to manufacture, the test speed is high, the result is accurate and reliable, and the method can be applied to manufacturing of high-electro-mobility heterojunction transistors.

An OPC (optical proximity correction) modeling method controlling a false alarm rate of an auxiliary graph signal comprises the steps of designing a main test graph, designing a plurality of groups of auxiliary graphs to be added to the peripheries of a one-dimensional standard graph and a two-dimensional standard graph, collecting on-line line width measurement data of the main test graph and imaging data of the groups of auxiliary graphs, establishing a corresponding document between a layout and the line width measurement data of the main test graph, adding a corresponding point between imaging graphic information and signal monitoring data of the groups of auxiliary graphs, performing model fitting operation, allowing a residual error between a line width value of a model and a measured line width value to be statistically minimum, adding an imaging graphic signal for monitoring the groups of auxiliary graphs in the model fitting operation process, and outputting the model for graph OPC.