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44 results about "Co implantation" patented technology

Co-Implantation. ドーパント原子と共に炭素(C)、窒素(N)、フッ素(F)等の原子を注入することにより、熱処理時のドーパントの拡散が抑制される効果が得られる。浅い接合を形成するために用いられることがある。 PAI(Pre-Amorphization Implantation)

Compound semiconductor modified surface by use of pulsed electron beam and ion implantation through a deposited metal layer

Thermally sensitive at elevated, near melting point temperature, compound semiconductor materials single crystals including Group III-Nitride, other Group III-V, Group II-VI and Group IV-IV are produced by a variety of methods. When produced as single crystal layers by epitaxy methods or is necessary to expose them to elevated temperatures or ion implanted to the non crystalline state, or their electrical or optical properties are modified, large numbers of crystal defects on the atomic or macro scale may be produced, which limit the yield and performance of opto- and electronic devices constructed out of and grown on top of these layers. It is necessary to be able to improve the crystal quality of such materials after being exposed to elevated temperature or ion implanted or modified by the presence of impurities. It is necessary, particularly for opto- and electronic devices that only the surface of such materials is processed, improved and thus the modified surface product. Generally, as shown in FIG. 1, the thermally sensitive compound semiconductor layer is first coated with a metal layer of approximate thickness of 0.1 microns. Next, the volatile component of the compound semiconductor is ion implanted through the metal layer so as to occupy mostly the top 0.1 to 0.5 microns of the compound semiconductor layer. Co-implantation may be used as well to improve the surface. Finally, through a pulsed directed energy beam of electrons with a fluence of approximately 1 Joule / cm2, the top approximately 0.5 microns acquire a level of the deposited metal and are converted into a single crystal with improved properties such as reduced defect density and or electrical dopant (FIG. 1).
Owner:MELAS ANDREAS A

Method for preparing InP thin film heterogeneous substrate

InactiveCN106711026ASolve the problem that the peeling cannot be achievedReduce ion implantation doseSolid-state devicesSemiconductor/solid-state device manufacturingBond interfaceOptoelectronics
The invention provides a method for preparing a InP thin film heterogeneous substrate. The method at least comprises the steps of providing an InP substrate which has an injection plane; carrying out ion co-implantation on the injection plane to form a defect layer at a preset depth of the InP substrate; providing a heterogeneous substrate, bonding the InP substrate and the heterogeneous substrate, and taking the injection plane of the InP substrate as a bonding interface; peeling part of the InP substrate along the defect layer, getting a part of the InP substrate transferred onto the heterogeneous substrate to form an InP thin film on the heterogeneous substrate to obtain the InP thin film heterogeneous substrate. By the scheme, the dosage of unitary ion injection required by peeling and transferring InP thin film cam be effectively reduced, the adoption of a sub-zero low temperature injection method to peel an InP material, which is reported in literature, is avoided simultaneously, then the preparation period is shortened, and the cost of production is saved; and low-temperature or high-temperature injection is not required, so that the additional energy consumption required by controlling injection temperature can be reduced.
Owner:SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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