An
Ethernet architecture is provided for connecting a computer
system or other network entity to a dedicated
Ethernet network medium. The
network interface enables the transmission and
receipt of data by striping individual
Ethernet frames across a plurality of logical channels and may thus operate at substantially the sum of the individual channel rates. Each channel may be conveyed by a separate conductor (e.g., in a bundle) or the channels may be carried simultaneously on a
shared medium (e.g., an electrical or optical conductor that employs a form of
multiplexing). On a sending
station, a
distributor within the sender's
network interface receives Ethernet frames (e.g., from a MAC) and distributes frame bytes in a round-robin fashion on the plurality of channels. Each “mini-frame” is separately framed and encoded for transmission across its channel. On a receiving
station, the
receiver's
network interface includes a collector for collecting the multiple mini-frames (e.g., after decoding) and reconstructing the frame's
byte stream (e.g., for transfer to the
receiver's MAC). The first and last bytes of each frame and mini-frame are marked for ease of recognition. Multiple unique idle symbols may be employed for transmission during inter-packet gaps to facilitate the collector's synchronization of the multiple channels and / or enhance error detection. A maximum channel
skew is specified, and each received channel may be buffered with an elasticity that is proportional to the maximum
skew so that significant
propagation delay may be encountered between channels without disrupting communications.