31 results about "Busy waiting" patented technology

A method and system for content pre-fetching during a processing system pre-boot runtime. First, it is determined when a processor of a processing system is in one of a busy wait state and an idle state during a pre-boot runtime of the processing system. Then, content is pre-fetched from a data storage unit of the processing system. The content is pre-fetched based upon a pre-fetch profile. The content is loaded into system memory of the processing system.

In a computer system according to the background art, when a request to halt a virtual processor was detected, the virtual processor was blocked. In the blocking method, latency of virtual halt exit of the virtual processor was so long that a problem of performance was caused. A virtual machine monitor selects either of a busy wait method for making repeatedly examination until the virtual halt state exits while the virtual processor stays on the physical processor and a blocking method for stopping execution of the virtual processor and scheduling other virtual processors on the physical processor while yielding the operating physical processor and checking off scheduling of the virtual processor to the physical processor, based on a virtual processor halt duration predicted value of the virtual processor which is an average value of latest N virtual processor halt durations of the virtual processor.

A computer system may recognize a busy-wait loop in program instructions at compile time and / or may recognize busy-wait looping behavior during execution of program instructions. The system may recognize that an exit condition for a busy-wait loop is specified by a conditional branch type instruction in the program instructions. In response to identifying the loop and the conditional branch type instruction that specifies its exit condition, the system may influence or override a prediction made by a dynamic branch predictor, resulting in a prediction that the exit condition will be met and that the loop will be exited regardless of any observed branch behavior for the conditional branch type instruction. The looping instructions may implement waiting for an inter-thread communication event to occur or for a lock to become available. When the exit condition is met, the loop may be exited without incurring a misprediction delay.

Enable a read command of a first flash memory. After the read command of the first flash memory is enabled, a ready / busy signal of the first flash memory enters a busy waiting time, and a read command of a second flash memory starts to be enabled. Start to read data of the first flash memory when the busy waiting time is over. Enable the read command of the first flash memory again upon completion of reading the data of the first flash memory. Start to read data of the second flash memory after the read command of the first flash memory is enabled again. And enable the read command of the second flash memory again upon completion of reading the data of the second flash.

The invention discloses a method for manufacturing a flat-panel liquid crystal antenna. The method comprises steps of: providing a first substrate, wherein the two sides of the first substrate are provided with a first metal film layer and a third metal film layer respectively; patterning the double metal film layers simultaneously to obtain a patterned first metal film layer and a patterned thirdmetal film layer; providing a second substrate having a second metal film layer at one side; patterning the second metal film layer to obtain a patterned second metal film layer; combining the firstsubstrate and the second substrate to form a liquid crystal cell, and preparing a liquid crystal layer. The present invention also discloses a flat-panel liquid crystal antenna manufactured by the method. By means of structural improvement, the method makes it possible to simultaneously pattern the double-sided metal, removes inefficient yellow light process steps, and saves busy waiting time andmodel switching tuning time. The flat-panel liquid crystal antennas can be manufactured on a large scale, which improves the manufacturing efficiency and reduces the manufacturing cost.

An integrated circuit provided with a processor includes a loop detection unit that detects execution of a loop in the processor, a loop-carried dependence analysis unit that analyzes the loop in order to detect loop-carried dependence, and a power control unit that performs power saving control when no loop-carried dependence is detected. By detecting whether a loop has loop-carried dependence, loops for calculation or the like can be excluded from power saving control. As a result, a larger variety of busy-waits can be detected, and the amount of power wasted by a busy-wait can be reduced.

A system and method that can support queue processing in a computing environment such as a distributed data grid. A thread may be associated with a queue in a computing environment where the thread runs on one or more microprocessors supporting a central processing unit (CPU). When one or more tasks arrive on the queue, the system can use threads to process the one or more tasks. Additionally, the system can adaptively configure threads to be in one of the sleep and idle states when there are no tasks in the queue.

The invention discloses a method for receiving message passing interface (MPI) information under the circumstance of over-allocation of a virtual machine, which comprises the following steps: polling a socket file descriptor set or shared memory, invoking a sched_yield function, and releasing the currently-occupied virtual processor resource of the process in a blocking information receiving process; inquiring the run queue of a virtual processor and selecting a process which can be scheduled to carry out scheduling operation by a user operating system in a virtual machine comprising the virtual processor; when the blocking information receiving process is re-scheduled to operate, judging whether needing to notify a virtual machine manager of executing the rescheduling operation of the virtual processor; and executing the rescheduling operation of the virtual processor by the virtual machine manager through super invoking in the blocking information receiving process, and dealing withthe received information in the blocking information receiving process. The invention can reduce the performance loss caused by 'busy waiting' phenomenon produced by an MPI library information receiving mechanism.

The invention provides a high-security computer system based on lock-step and monitoring and a design method thereof. When the processor performs a read operation, the dual processors respectively read data from the same address of the two memories and compare them. If the comparison is correct, the data is sent to the corresponding processor. If the comparison is wrong, the fault handling operation is performed; the comparison module for monitoring and lockstep is set up, and the checkpoint output is added to the load. When the checkpoint arrives, the cross comparison is performed. If the comparison is correct, the system is based on operation; if the comparison is incorrect, the troubleshooting operation is performed. The invention realizes fault detection and location at the instruction level, greatly reduces system faults caused by random faults in the memory, improves the detection rate of the dual-processor common-mode faults of the lockstep module, and further improves the safety of the entire system, effectively It solves the problem that the running speed of dissimilar processors does not match, and reduces the busy waiting time of the monitoring unit.

Embodiments of the present invention provide a cloud platform device and system for team safety training, which belong to the fields of safety engineering technology and information technology. The cloud platform device adopts a layered architecture, and includes from bottom to top: an infrastructure layer, which is used to provide physical resources suitable for team safety training, and perform virtualization processing and cloud management of the physical resources; a data service layer , for providing data resources suitable for team safety training; platform service layer, for developing application services and management services suitable for team training in a microservice encapsulation method based on the physical resources and the data resources; and software encapsulation The layer is used to encapsulate and release the services developed by the platform service layer to the training platform. The solution of the present invention can be used to carry out various forms of team safety training activities, and can realize continuous updating of training content through cloud push.

The invention discloses a method and a system for reducing power consumption of a multi-thread program. The method comprises the steps as follows: when one thread arrives the first barrier, the address of the barrier and the time that the last thread leaves the barrier are recorded in a barrier interval time predicting table; when the last thread leaves the barrier i+1, the time that the last thread leaves the barrier i is subtracted from the time at this moment, so that the interval time of the barrier i is obtained; the address and the interval time of the barrier i are written into the barrier interval time predicting table; when threads arrive the same barrier again, the computation time is subtracted from the interval time read out from the barrier interval time predicting table adopted by the thread arriving a barrier synchronization point first, the busy waiting time of the thread is predicted, and the thread chooses to enter an appropriate low power consumption mode; when the predicted interval time of the barrier is coming, the thread arriving the barrier synchronization point first is restored into a normal power consumption mode, and the barrier interval time predicting table is updated, so that the power consumption of the whole processor is reduced.