50results about How to "Write reliably" patented technology

A semiconductor memory maintains securely the stored contents in the memory cells, and it is written with data reliably even in a case where a relatively low supply voltage is applied. A memory cell M00 comprises a pair of inverters cross-coupled with each other, a first switching unit provided between bit line BL and the output terminal of one of the inverters, and a second switching unit provided between bit line XBL and the output terminal of the other inverter. The first switching unit and the second switching unit are controlled to be conductive such that the conductance of the switches be larger for the writing operation than for the reading operation.

Temporary lock-out is provided while programming a group of non-volatile memory cells to more accurately program the memory cells. After successfully verifying that the threshold voltage of a memory cell has reached the level for its intended state, it is possible that the threshold voltage will subsequently decrease to below the verify level during additional iterations of the programming process needed to complete programming of other memory cells of the group. Memory cells are monitored (e.g., after each iteration) to determine if they fall below the verify level after previously verifying that the target threshold voltage has been reached. Cells that pass verification and then subsequently fail verification can be subjected to further programming. For example, the bit line voltage for the memory cell of interest may be set to a moderately high voltage to slow down or reduce the amount of programming accomplished by each subsequent programming pulse. In this manner, a memory cell that falls out of verification can be placed back in the normal programming flow without risking over-programming of the cell.

To provide a display device and an electronic apparatus including a radio communication device, an embodiment of the radio communication device being an IC tag, which do not need a special space to attach the IC tag and is capable of reducing the amount of time and effort required for attaching the IC tag, a display device including a radio communication device having at least one substrate provided with a display unit and display-unit-driving wiring lines 9 and 10 , a communication integrated-circuit unit, and an antenna is provided. At least a part of the antenna is formed on the substrate and formed of a conductor formed in the same layer as a conductor that constitute the display unit or conductors that constitute the display-unit-driving wiring lines.

Temporary lock-out is provided while programming a group of non-volatile memory cells to more accurately program the memory cells. After successfully verifying that the threshold voltage of a memory cell has reached the level for its intended state, it is possible that the threshold voltage will subsequently decrease to below the verify level during additional iterations of the programming process needed to complete programming of other memory cells of the group. Memory cells are monitored (e.g., after each iteration) to determine if they fall below the verify level after previously verifying that the target threshold voltage has been reached. Cells that pass verification and then subsequently fail verification can be subjected to further programming. For example, the bit line voltage for the memory cell of interest may be set to a moderately high voltage to slow down or reduce the amount of programming accomplished by each subsequent programming pulse. In this manner, a memory cell that falls out of verification can be placed back in the normal programming flow without risking over-programming of the cell.

A system having a postcard having a thickness not to exceed 5.5 mm while containing an audio message for playback and a power supply, the system also having a base recording unit for recording a message to the postcard when the postcard is inserted into the base recording unit. The base recording unit has no power supply and draws power from the power supply on the postcard. The postcard is suitable for mailing using the postal service. The unit for recording is compact, has no power supply, is easily portable and is attractive. The card has a play-back button, a compact battery power source to drive play-back and recording of audio messages. The postcard is absent a record button allowing the postcard with an audio message to be sent through the postal system without the risk of accidental erasure of the recorded message. The card may be recorded and re-recorded when placed in the recording unit. The card contains an audio board that has an IC chip having memory for storing an audio message. The card and the recording unit are both absent a central processing unit.

A unit circuit includes an electro-optical element, a first capacitive element, a second capacitive element, a third capacitive element, a drive transistor, a first switching element, an initialization unit, and a compensation unit. The electro-optical element emits an amount of light in accordance with a magnitude of a drive current. The first capacitive element includes a first electrode and a second electrode, the first electrode is electrically connected to a first node, and the second electrode is capable of receiving a fixed potential. The second capacitive element includes a third electrode and a fourth electrode, the third electrode is electrically connected to a second node, and the fourth electrode is capable of receiving a fixed potential. The third capacitive element includes a fifth electrode and a sixth electrode, the fifth electrode is electrically connected to the first node, and the sixth electrode is electrically connected to the second node. The drive transistor includes a gate, a source, and a drain and outputs the drive current in a driving period. The gate thereof is electrically connected to the second node. In a data writing period, the first switching element is in an on state and supplies to the first node a data potential supplied via a data line. The initialization unit causes the third capacitive element to discharge charges stored therein in an initialization period. The compensation unit electrically connects the source and the drain of the drive transistor together in a compensation period.

A semiconductor memory maintains securely the stored contents in the memory cells, and it is written with data reliably even in a case where a relatively low supply voltage is applied. A memory cell M00 comprises a pair of inverters cross-coupled with each other, a first switching unit provided between bit line BL and the output terminal of one of the inverters, and a second switching unit provided between bit line XBL and the output terminal of the other inverter. The first switching unit and the second switching unit are controlled to be conductive such that the conductance of the switches be larger for the writing operation than for the reading operation.

Bit and write decode / drivers, a random access memory (RAM) including the decode / drivers and an IC with a static RAM (SRAM) including the decode / drivers. The decode / drivers are clocked by a local clock and each produce access pulses wider than corresponding clock pulses. The bit decode / driver produces bit select pulses that are wider than a word select pulse and the write decode / driver produces write pulses that are wider than the bit select pulses for stable self timed RAM write accesses.

A thin-film magnetic head for a heat-assisted magnetic recording which can perform a reliable writing immediately only on a desired track by applying a near-field light to a desired position and range is provided. The head comprises: an electromagnetic coil element for writing data signals, having a pole end reaching a head end surface; and a near-field-light-generating portion for heating a portion of a magnetic recording medium during write operation by generating a near-field light, having a generation end reaching the head end surface and provided adjacent to the pole end and in the leading side of the pole end, and a shape of the generation end on the head end surface being a trapezoid with a shorter edge on the trailing side, or being a triangle with an apex on the trailing side and with a bottom on the leading side.