138results about How to "Reduce plane size" patented technology

A transistor includes a substrate and an isolation region disposed in the substrate. The isolation regions defines an active region comprising upper and lower active regions, the upper active region having a first width and the lower active region having a second width greater than the first width. An insulated gate electrode extends through the upper active region and into the lower active region. Source and drain regions are disposed in the active region on respective first and second sides of the insulated gate electrode. The insulated gate electrode may include an upper gate electrode disposed in the upper active region and a lower gate electrode disposed in the lower active region, wherein the lower gate electrode is wider than the upper gate electrode. Related fabrication methods are described.

A membrane electrode assembly includes an electrolyte membrane, anode catalyst layers, and cathode catalyst layers provided counter to the anode catalyst layers, respectively. An insulating layer is provided on the electrolyte membrane between adjacent anode catalyst layers. An insulating layer is provided on the electrolyte membrane between adjacent cathode catalyst layers. The resistivity of the insulating layer is preferably identical to or higher than that of the electrolyte membrane.

A circuit device including a multilayer wiring structure having an improved heat radiation performance, and a manufacturing method thereof is provided. A circuit device of the invention includes a first wiring layer and a second wiring layer laminated while interposing a first insulating layer. The first wiring layer is connected to the second wiring layer in a desired position through a connecting portion formed so as to penetrate the first insulating layer. The connecting portion includes a first connecting portion protruding in a thickness direction from the first wiring layer, and a second connecting portion protruding in the thickness direction from the second wiring layer. The first connecting portion and the second connecting portion contact each other at an intermediate portion in the thickness direction of the insulating layer.

The size of a light emitting device is reduced. The light emitting device for flash photography includes: a luminescent xenon tube; IGBT for the discharge switch of the xenon tube; a capacitor for discharging the xenon tube; and MOSFET for the charge switch of the capacitor. A semiconductor device used in this light emitting device is obtained by sealing the following in a package: a semiconductor chip in which the IGBT is formed; a semiconductor chip in which the MOSFET is formed; a semiconductor chip in which a drive circuit of the IGBT and a control circuit of the MOSFET are formed; and multiple leads coupled thereto.

The invention discloses a double passband differential filter having a laminated substrate integration waveguide structure. The filter includes a medium substrate, an upper surface metal layer, a middle metal layer and a lower surface metal layer. A metallization through hole array penetrating through the medium substrate is arranged in the medium substrate. Six substrate integration waveguide cavities are defined by the metallization through hole array, the upper surfaced metal layer, the middle metal layer and the lower surface metal layer. The center frequency of the two differential passbands is obtained through adjusting upper layer cavity dimension parameters. At the same time, the middle metal layer is etched with an H-type coupling slot line. Through adjusting the size and the position of the slot line, a demanded coupling index is obtained, so that better frequency response is achieved. According to the invention, a second difference module passband is obtained by utilizing a substrate integration waveguide high order mode, the size of the filter is reduced effectively. Besides, through adjusting the position or the size of the metal etching slot line in the lower surface, common mode rejection and inter-band isolation are improved.

An electronic timepiece has a time display unit including a dial made from a non-conductive material, and hands; and a movement that drives the hands. The movement includes a circuit board, a planar antenna attached to the circuit board, a stepper motor that drives the hands, and a battery. The planar antenna, the stepper motor, and the battery are disposed to positions overlapping the time display unit in plan view, and not overlapping each other in plan view.

To provide a piezoelectric oscillator which can be reduced in size by reducing the planar size. With regard to a layered lead frame comprising two lead frames and, connection leads for connection with a piezoelectric resonator are formed on the upper lead frame and the connection leads are erected upwards so as to form connection terminals, and mounting leads for mounting to a mounting board are formed on the lower lead frame and the mounting leads are erected downwards so as to form mounting terminals, and an IC forming an oscillating circuit is mounted on the layered lead frame, the piezoelectric resonator formed by sealing a piezoelectric resonator element within a package is mounted on the layered lead frame, and the layered lead frame and the piezoelectric resonator are sealed within a resin package such that the principal surface of the mounting terminals are exposed outwards, thereby forming a completed article.

The invention discloses a broadband low-profile dielectric resonator antenna based on a two-dimensional periodic structure. The antenna comprises a first substrate, a second substrate located under the first substrate, and a dielectric resonator unit located above the first substrate for expanding the bandwidth,wherein, a microstrip feed line is disposed on a lower surface of the second substrate,a coupling feed slot perpendicular to the microstrip feed line is formedin an upper surface of the second substrate, a plurality of metalized through holes are formed around the dielectric resonatorunit, the metalized through holes penetrate the first substrate and the second substrate to form a substrate integrated waveguide back cavity, and the dielectric resonator unit includes a plurality ofdielectric sub-blocks spaced apart from each other in an array. The antenna has the characteristics of low profile and small plane size while satisfying the broadband, and is suitable for antenna array design.

The invention relates to an ecological interlocking slope protection vegetation brick and a preparation method thereof. The vegetation brick comprises a block body and a vegetation disk, the block body comprises a center portion, a mounting clamp block, a mounting clamp groove, the center portion is provided with a center hole, the vegetation disk is arranged in the center hole, the upper surface of the vegetation disk is lower than that of the center portion, the center portion is provided with a front side surface, a rear side surface, a left side surface and the right side surface in the vertical direction, the mounting clamp block is positioned on the front side surface and left side surface and extends to the direction far wary from the center portion, the mounting clamp groove is respectively recessed to the center direction of the center portion from the rear side surface and the right side surface of the center portion, thickness of the mounting clamp block and the depth of the mounting clamp groove are equal and smaller than the thickness of the center portion, and the mounting clamp block and the mounting clamp groove on the adjacent slope protection vegetation bricks are mutually meshed, so that all-directional interlocking is achieved. Bricks are paved without mortar concrete in interlocking and self-embedding manner, and the vegetation brick is simple and easy to operate, low in construction cost, high in construction efficiency and applicable to slope strengthening and ecological restoration.

The invention discloses a large-stroke three-dimensional nano flexible moving platform. The platform comprises a substrate; a terminal platform; an X-direction driver and a Y-direction driver; a first Z-direction flexible decoupling device and a second Z-direction flexible decoupling device, wherein one end of the first Z-direction flexible decoupling device and one end of the second Z-direction flexible decoupling device are connected with the terminal platform; a first amplifying rod and a second amplifying rod, wherein the lower end of the first amplifying rod is connected with the substrate through a first lower flexible hinge, and the upper end of the first amplifying rod is connected with the first Z-direction flexible decoupling device through a first upper flexible hinge. The lower end of the second amplifying rod is connected with the substrate through a second lower flexible hinge, and the upper end of the second amplifying rod is connected with the second Z-direction flexible decoupling device through a second upper flexible hinge. The X-direction driver is connected with the first amplifying rod, and the Y-direction driver is connected with the second amplifying rod. The platform provided by the invention is small in plane side, is high in moving precision, and has advantages of centimeter-level large stroke and nano precision.

The invention relates to a TFT-LCD array substrate and a manufacturing method thereof. The array substrate comprises a grid wire, a data wire, a pixel electrode and a thin film transistor. The array substrate is characterized in that the thin film transistor comprises a grid electrode connected with the grid wire and a source electrode connected with the data wire; at least one through hole is formed on the grid electrode or a through groove is formed on at least one side of the grid electrode; and a semiconductor layer which is connected with the pixel electrode and the source electrode respectively is filled in the through hole or the through groove. The array substrate changes a 'planar type' TFT structure which is universally adopted in the prior art, changes the planar structure into a spatial structure, and has the characteristics of simple and compact structure, good parameter property, simple manufacturing process and the like. The array substrate realizes the effect of increasing the starting current and has certain improvement on other electrical parameters, and the spatial structure of the array substrate reduces the planar size and increases the spatial utilization rate so as to increase the opening ratio.

An information processing apparatus includes a display section and a main body section. The display section is disposed on a first surface and has a display panel and a display panel case. The display panel case houses the display panel such that the display panel can display an image. The display panel case has a protrusion portion formed at a first end. The main body section is disposed on a second surface and has an input section and a depressed portion. The depressed portion is formed at a second end of the second surface and has a pierced portion and a housing portion. The pierced portion is formed from the second surface to an opposite surface thereof such that a battery is attached to the pierced portion. The housing portion axially houses the protrusion portion on a side opposite to the input section with respect to the pierced portion.

A semiconductor device is disclosed wherein first wiring lines in a first row extend respectively from first connecting portions toward one side of a semiconductor chip, while second wiring lines extend respectively from second connecting portions toward the side opposite to the one side of the semiconductor chip. The reduction in size of the semiconductor device can be attained.

A semiconductor device is disclosed wherein first wiring lines in a first row extend respectively from first connecting portions toward one side of a semiconductor chip, while second wiring lines extend respectively from second connecting portions toward the side opposite to the one side of the semiconductor chip. The reduction in size of the semiconductor device can be attained.

A surface mount crystal oscillator comprises a package body having a first recess, a cover having a second recess, a crystal blank secured to an inner bottom surface of the second recess, and an IC chip secured to a bottom surface of the first recess. The IC chip has an oscillation circuit using the crystal oscillator integrated therein, and has IC terminals on one main surface for connection to the outside. A first and a second annular metal film are disposed to surround open end surfaces of the first recess and second recess, respectively. By bonding the first and second annular metal films with an eutectic alloy, the crystal blank and IC chip are hermetically sealed in a space defined by the integrated first and second recesses.

The invention provides a Fingerprint of Thing encoding method and system. According to the method and system, the encoding of numbers and / or letters is realized through setting at least one fingerprint feature point on at least one fingerprint line on at least one preset fingerprint template by means of a human body fingerprint image, so as to form fingerprint graphs which comprise specific information, and the fingerprint graphs can be used for carrying out code identification on products. The fingerprint graphs comprise specific encoding information of certain articles and are unique like human body fingerprints when being formed on the articles; and the fingerprint graphs which express the specific identity information of the articles by using feature points are called as Fingerprints of Things (FOT). The Fingerprints of Things serve as brand-new codes which are derived from human body fingerprint graphs and have two-dimensional sizes, comprise more information than one-dimensional codes, and are capable of solving the problem that the one-dimensional codes cannot express the two-dimensional codes and are too complicated. By using the encoding method and system provided by the invention, a Fingerprint of Thing which comprises specific identity information can be imprinted for each product; and the Fingerprints of Things are like human body fingerprints which are unchanged lifelong and can be checked at any time.

The invention discloses a half mode substrate integration waveguide horizontal symmetrical filter small in size. According to the filter, source and a load coupling is introduced between a source and a load through a fifth sensing coupling window arranged between an input end and an output end, two transmission zeroes out of a band can be achieved only by using two half film resonant cavities. In comparison with a traditional substrate integration waveguide filter which needs four resonant cavities to achieve the two transmission zeroes, the half mode substrate integration waveguide horizontal symmetrical filter reduces the size by a half while original selectivity is maintained, the two transmission zeroes can be flexibly adjusted and controlled according to actual demands, and the actual system requirements are met. In addition, the first resonant cavity of the filter works in a TE102 mode, the second resonant cavity works in a TE101 mode, the areas of the two resonant cavities are only a half of those of traditional square resonant cavities, the plane size of the filter is effectively reduced, and system integration is facilitated. The half mode substrate integration waveguide horizontal symmetrical filter is suitable for popularization and application in the technical field of microwave millimeter waves.

A surface mount crystal oscillator comprises a package body having a first recess, a cover having a second recess, a crystal blank secured to an inner bottom surface of the second recess, and an IC chip secured to a bottom surface of the first recess. The IC chip has an oscillation circuit using the crystal oscillator integrated therein, and has IC terminals on one main surface for connection to the outside. A first and a second annular metal film are disposed to surround open end surfaces of the first recess and second recess, respectively. By bonding the first and second annular metal films with an eutectic alloy, the crystal blank and IC chip are hermetically sealed in a space defined by the integrated first and second recesses.

An information processing apparatus includes a display section and a main body section. The display section is disposed on a first surface and has a display panel and a display panel case. The display panel case houses the display panel such that the display panel can display an image. The display panel case has a protrusion portion formed at a first end. The main body section is disposed on a second surface and has an input section and a depressed portion. The depressed portion is formed at a second end of the second surface and has a pierced portion and a housing portion. The pierced portion is formed from the second surface to an opposite surface thereof such that a battery is attached to the pierced portion. The housing portion axially houses the protrusion portion on a side opposite to the input section with respect to the pierced portion.

[Problem] To provide an electronic module that can be miniaturized, and a method for manufacturing the same. [Solution] An electronic module (1) provided with: an electronic module (10) having a substrate (11) that has a principal surface (11a) and a principal surface (11b), and also having an electronic element (12) mounted on the principal surface (11a); an electronic module (20) thermally connected to the electronic module (10) via connecting members (18, 19), the electronic module (20) having a substrate (21) that has a primary surface (21a) and a primary surface (21b) and is disposed so that the primary surface (21a) faces the primary surface (11a), and also having an electronic element (22) mounted on the primary surface (21a) and electrically connected to the electronic element (12) via the connecting member (18), and an electronic element (23) mounted on the primary face (21b) and electrically connected to the electronic element (12) via the connecting member (19)that passes through the substrate (21) in the thickness direction; and a heat sink (30) internally provided with a storage section (31a), the heat sink (30) storing the electronic modules (10, 20) in the storage section (31a) so that the primary surface (11b) is in contact with the inner wall surface of the storage section (31a).

The invention relates to a low-specific speed small mixed flow water turbine which is used for a water-cooling tower system. The low-specific speed small mixed flow water turbine is formed by connecting a volute casing, a guide vane, a rotary wheel and a tail water tube in sequence, wherein the centers of the volute casing, the guide vane, the rotary wheel and the tail water tube are arranged on the same vertical axis; the low-specific-speed small mixed flow water turbine is characterized by further comprising a twisted blade which is arranged between a rotary wheel upper canopy and a rotary wheel lower ring, wherein the thickness, in the direction vertical to the bone surface, of the twisted blade is equal; the ratio of the thickness B1 of the twisted blade to the water inlet height B2 of the twisted blade is 0.1-0.15; the water inlet height B2 of the twisted blade is the same as the height B3 of the guide vane; the ratio of the water inlet height B2 of the twisted blade to the diameter D1 of a water inlet of the rotary wheel is 0.1-0.2; and the radial section of the volute casing is rectangular. The low-specific-speed small mixed flow water turbine has the advantages of being high in operating efficiency, good in hydraulic performance, low in manufacturing cost and the like, and can be used for satisfying the needs of driving an air blower in the water-cooling tower system.

A piezoelectric device includes an integrated circuit (IC) chip and a piezoelectric resonator element, a part of the piezoelectric resonator element being disposed so as to overlap with a part of the IC chip when viewed in plan. The IC chip includes: an inner pad disposed on an active face and in an area where is overlapped, with the piezoelectric resonator when viewed in plan; an insulating layer formed on the active face; a relocation pad disposed on the insulating layer and in an area other than a part where is overlapped with the piezoelectric resonator element, the relocation pad being coupled to an end part of a first wire; and a second wire electrically coupling the inner pad and the relocation pad, the second wire having a relocation wire and a connector that penetrates the insulating layer, the relocation wire being disposed between the insulating layer and the active face.

At least two switching devices each including a substrate formed of a wide bandgap semiconductor, source and gate electrodes formed in a principal surface side of the substrate, and a drain electrode formed on the back surface of the substrate are stacked so that respective upper surface sides of the switching face each other.

A method to prevent contamination of the principal surface side in a process of grinding the back surface side of a semiconductor wafer. At an intersection of a scribe region of a semiconductor wafer whose back surface side is to be ground, a plurality of insulating layers is laminated over the principal surface in the same manner as an insulating layer constituting a wiring layer laminated over a device region. Moreover, in the same layer as an uppermost wiringdisposed at the uppermost layer among a plurality of the wiring layers formed for a device region, a metal pattern is formed. Furthermore, a second insulating layer covering the uppermost wiring is also formed over the metal pattern so as to cover the same.

The invention discloses a piezoelectric emission capacitor sensing high-performance MUT unit and a preparation method thereof. An ultrasonic transmitting working mode of the PMUT unit and an ultrasonic receiving working mode of the CMUT unit are combined with each other. The MUT unit is composed of a piezoelectric driving annular thin film and a circular capacitance sensing thin film stacked on the upper surface of the annular thin film. In the ultrasonic transmitting working mode, the annular thin film is driven based on the inverse piezoelectric effect, meanwhile, the circular thin film stacked on the annular thin film is driven to generate piston type vibration, and therefore the ultrasonic emission directivity and ultrasonic output are improved. In the ultrasonic receiving working mode, the annular thin film and the circular thin film are simultaneously subjected to an incident ultrasonic action to generate deflection. Due to the superposition of the deflection of the circular thinfilm and the annular thin film, the stroke variation between the capacitor upper polar plate and the capacitor lower polar plate is increased, so that the unit ultrasonic receiving sensitivity is improved; and meanwhile, the unit can work in a collapse mode by adopting lower bias voltage in an ultrasonic receiving mode, so that the ultrasonic receiving sensitivity of the unit is further improved.

A P-channel MOS transistor and an N-channel MOS transistor are respectively controlled by a first control signal and a second control signal. The first control signal CTL1 and the second control signal CTL2 are independent from each other. The second control signal CTL2 is generated by a NOR circuit 2 to which a data signal DATA and a third control signal CTL3 are inputted. A load capacitor C1 which samples the first electric potential or the GND electric potential is configured by a gate capacitance of another MOS transistor.

The delay demodulation device 1 comprises: an input waveguide 2 which receives DQPSK signals; a Y-branch waveguide 3 which splits the input waveguide 2; a first Mach-Zehnder interferometer 4; and a second Mach-Zehnder interferometer 5. Both end of two arm-waveguides 8, 9 of the first Mach-Zehnder interferometer 4 and both ends of two arm-waveguides 12, 13 of the second Mach-Zehnder interferometer 5 are angled toward the center portion of a planar lightwave circuit (PLC) 1A. Because of the angle, the length of the two arm-waveguides 8, 9 of the first Mach-Zehnder interferometer 4 and the length of the two arm-waveguides 12, 13 of the second Mach-Zehnder interferometer 5 in Z-direction can be shortened, and input couplers 6,10 and output couplers 7,11 of each Mach-Zehnder interferometers in Z-direction can be shortened as well. The area occupied by each Mach-Zehnder interferometers 4, 5 are also reduced.