99results about How to "Eliminate processing steps" patented technology

Normalization of regions of a sensor panel capable of detecting multi-touch events, or a sensor panel capable of detecting multi-hover events, is disclosed to enable each sensor in the sensor panel to trigger a virtual button in a similar manner, given the same amount of touch or hover. Each sensor produces an output value proportional to the level or amount of touch or hover. However, due to processing, manufacturing and physical design differences, the sensor output values can vary from region to region or panel to panel for a given amount of touch or hover. To normalize the sensor output values across regions, gain and offset information can be obtained in advance, stored in nonvolatile memory, and later used to normalize the sensor output values so that all regions in the sensor panel can trigger virtual buttons similarly, providing a uniform “response function” at any location on the sensor panel.

An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.

A low-cost field-effect transistor with a moisture-resistant gate covered by a thick moisture-resistant insulating film which suppresses an increase in gate capacitance, and a method of manufacturing the field-effect transistor. The field-effect transistor, has one of a T-shaped gate electrode and Γ-shaped gate electrode, a drain electrode, and a source electrode, the source electrode and the drain electrode being electrically connected through an n-doped semiconductor region. The gate, source, and drain electrodes are located on a semiconductor layer which includes an insulating film having a thickness of 50 nm or less and covering a surface of the gate electrode and a surface of the semiconductor layer. A silicon nitride film, deposited by catalytic CVD, covers the insulating film and includes a void volume located between a portion of the gate electrode corresponding to a canopy of an open umbrella and the semiconductor layer.

A technique for monitoring an execution of a program is provided. At least one relational query is constructed and compiled into a program instrumentation. The program instrumentation is incorporated into the program and one or more query results are output from the program as the program executes.

The invention provides methods of synthesizing peptides, involving the steps of providing a composition including a peptide fragment, wherein the peptide fragment has at least one amino acid residue and includes a base-sensitive, N-terminal protecting group; removing the base-sensitive, N-terminal protecting group from the peptide fragment using a deprotection reagent that includes a base, whereby an N-terminal functionality on the peptide fragment is deprotected; removing the base from the composition to provide a residual base content of more than 100 ppm; causing a reactive peptide fragment having a reactive C-terminus and a base-sensitive N-terminal protecting group to react with the deprotected N-terminal functionality of the peptide fragment under conditions such that the reactive peptide fragment is added to the peptide fragment; and optionally repeating the deprotection and coupling steps until a desired peptide is obtained. Also provided are methods of synthesizing peptides, wherein base is removed from the composition to a point where the composition would provide a positive chloranil test. Also provided are methods of synthesizing peptides, wherein coupling is performed in basic reaction mixtures.

A method and apparatus provides OFDM signal compression for transfer over serial data links in a base transceiver system (BTS) of a wireless communication network. For the uplink, an RF unit of the BTS applies OFDM cyclic prefix removal and OFDM frequency transformation of the baseband signal samples followed by frequency domain compression of the baseband signal samples, resulting from analog to digital conversion of received analog signals followed by digital downconversion, forming compressed coefficients. After transfer over the serial data link, the baseband processor applies frequency domain decompression to the compressed coefficients prior to further signal processing. For the downlink, the RF unit performs frequency domain decompression of the compressed coefficients and applies OFDM inverse frequency transformation of the decompressed coefficients and OFDM cyclic prefix insertion prior to digital upconversion and digital to analog conversion, generating the analog signal for transmission over the antenna.

An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment. The event based test system includes an event memory for storing event data derived directly from simulation of design data for an intended IC in the EDA environment where the event data to denote each event is formed with time index indicating a time length from a predetermined point and an event type indicating a type of change at an event, an event generation unit for generating test vectors based on the event data where waveform of each vector is determined by the event type and a timing of the waveform is determined by accumulating the time index of previous events, and means for supplying test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.

A PGIA for use in measurement devices (e.g., data acquisition device) including a composite amplifier for level shifting and improved signal-to-noise ratio. The composite amplifier may level shift from a constant common mode voltage to a lower common mode voltage with a large voltage swing. The large output signal swing of the PGIA may allow excellent signal-to-noise ratio. Additionally, input op-amps of the PGIA may be bootstrapped so that their supply rails move according to an input signal of the PGIA. The PGIA may also include protection circuitry to protect components from damage, e.g., due to over-current conditions, and to keep all op-amps in proper closed loop operation. Furthermore, the PGIA may include DA compensation circuitry to cancel some dielectric absorptions effects and improve a step response of the PGIA and CMRR enhancement circuitry to increase symmetry at inputs of the PGIA and improve a CMRR associated with the PGIA.

A semiconductor device and a manufacturing method thereof, which can reduce a number of manufacturing processes and / or can reduce a thickness of the semiconductor device. As a non-limiting example, various aspects of this disclosure provide for the elimination process steps and / or a reduction in package size based on dielectric layer characteristics.

An electrical power cable with a foamed, compressible, semiconductive insulation shield which serves as both a cushioning layer and an electrical shield.