42 results about "Wilson current mirror" patented technology

The invention discloses a linear analog counting circuit based on capacitor discharging. The circuit is constituted by a counting capacitor C and eight NMOS tubes. The eight NMOS tubes comprise an MN0, an MN1, an MN2, an MN3, an MN4, an MN5, an MN6, and an MN7. The MN0 is a signal input switch, and the MN1, the MN2, the MN3, and the MN4 are used to form an improved Wilson current mirror. The MN5 is a reset switch, and an MOS tube MN 6 and an MOS tube MN7 are used to form a voltage following circuit, which is used as the output stage of the circuit, and the output stage of the circuit is used to output the final counting results of the counting capacitor. The counting circuit has advantages of small circuit area, high filling coefficient, high linearity, large counting range, and applicability in counting of number of photons of high-density, full-integration, and low-cost SPAD array detector.

An active matrix organic light emitting diode AMOLED driving circuit using current feedback that ensures the uniformity of brightness in pixels of a flat panel display and shortens the time required to input accurate current to respective pixels in the driving circuit.The prevent invention provides an AMOLED driving circuit using current feedback, comprising: a current digital-to-analog converter outputting a current corresponding to input digital data; a first differential amplifier connected to the current digital-to-analog converter and controlling the input data current and a driving current of a driving transistor of a pixel circuit to be identical to each other; a current mirror mirroring driving current of an organic light emitting diode of the pixel circuit to an input side of the first differential amplifier; and a second differential amplifier coupled to the current mirror and controlling charge and discharge speeds of parasitic capacitance of the pixel circuit.

A source driver circuit of a liquid crystal display device including a gamma buffer. The gamma buffer includes a differential amplification section configured to differentially amplify an input signal; a current mirror section configured to operate as a current mirror; an enable section configured to convert the differential amplification section from a standby mode to an enable mode by a bias voltage; a power drop speed improvement section configured to respectively connect drains of the two PMOS transistors of the current mirror section and drains of the two NMOS transistors of the differential amplification section through two diode coupling type MOS transistors, and shorten a recovery time after a power drop; and an output section configured to be determined in a bias level thereof by the bias voltage and generate an output voltage according to a voltage of a downstream node on one side of the current mirror section.

The invention discloses a subthreshold level shifter having a wide input voltage range. The subthreshold level shifter comprises a Wilson current mirror and an inverter. The Wilson current mirror comprises three PMOS and two NMOS. The source electrode of the first PMOS and the source electrode of the second PMOS are connected with a high power supply voltage. The drain electrode of the first PMOS is connected with the source electrode of the third PMOS, and the drain electrode of the third PMOS is connected with the drain electrode of the first NMOS, and the source electrode of the first NMOS is grounded. The drain electrode of the second PMOS is connected with the drain electrode of the second NMOS, and the source electrode of the second NMOS is grounded. The grid of the first PMOS and the grid of the second PMOS are connected with the drain electrode of the first PMOS, and the grid of the third PMOS is connected with the drain electrode of the second PMOS. The grid of the first NMOS is used as the first input end of the Wilson current mirror, and is connected with one end of the inverter, and the grid of the second NMOS is used as the second input end of the Wilson current mirror, and is connected with the other end of the inverter. The drain electrode of the second PMOS is the output end of the Wilson current mirror, and the inverter is connected with an input level. The subthreshold level shifter is used to solve the voltage drop problem of the Wilson current mirror structure and a power consumption problem of a cross coupling structure under a subthreshold voltage.

The invention discloses a current type signal detection analog front end circuit which comprises a band-gap reference source, a current mirror, a buffer, a transimpedance amplifier and a successive approximation analog-to-digital converter, wherein the band-gap reference source is used for generating 10 microamperes current required by the current mirror and providing 300 mV bias voltage, the current mirror loads the mirror image of the 300 mV bias voltage to a magnetic sensitive biosensor array and provides an output path for detection current, the buffer is used for reducing the influence of circuit vibration on the 300 mV bias voltage, the transimpedance amplifier converts the detection current into detection voltage and amplifies the detection voltage, the successive approximation analog-to-digital converter converts the detection voltage into a digital code and outputs the digital code to DSP (Digital Signal Processor), and thus the detection is finished. According to the invention, the mode of single-chip full integration and current detection is adopted, weak variation signals in magnetic sensitive biosensors are extracted effectively, the transimpedance amplifier is used for converting the detection current into the detection voltage and amplifying the detection voltage reasonably, and finally the analog-to-digital converter outputs the digital code.

A current feedback circuit is used in the source follower. The source follower includes a first MOS transistor and a current mirror. The first MOS transistor has a gate receiving an inputting signal and a source outputting an output signal. A drain current flows through the first MOS transistor. The current mirror generates the drain current according to an adding current. The current feedback circuit is used for stabilizing the drain current to a constant value substantially. The current feedback circuit includes a passive component and an operational amplifier. The passive component has a first end and a second end, which has an error voltage when a corresponding current flows through the passive component. The magnitude of the corresponding current changes with the magnitude of the drain current. The operational amplifier outputs a reference signal to adjust the adding current according to the error voltage and a reference voltage.

The present invention mainly relates to a voltage regulator, comprising: a P typed power MOS; a feedback circuit; a differential amplifier; a protecting circuit having a N-typed transistor current mirror; and an active foldback current limiting circuit rather than using a resistor. When the P typed power MOS is under short circuit current situation, the current at the output side of the current mirror is increased in order to limit the current flown through the power MOS. Meanwhile, the same purpose can also be served by increasing the current at the input side of the DC current mirror.

A system and method are described for receiving differential currents in a current mode circuit. When conditions occur where the receiver inputs are floating, undriven, shorted together, or one or both shorted to ground, the output of the system remains stable. Diode connected MOS transistors receive the unequal currents, and current mirrors amplify the received currents. Those amplified mirrored currents are differentially amplified and converted into voltage signals suitable of typical computer and logic systems. The current mode differential nature of the invention provides high common mode current and voltage noise immunity. A threshold for the unequal currents helps provide high differential current and voltage noise immunity.

The invention concerns a load pump device able to provide a constant current, respectively positive or negative, over an extremely wide output voltage range. A symmetrical switching system activates a first operational amplifier (AOP1) associated with the positive current source or a second amplifier (AOP2) associated with the negative current source according to predetermined threshold values (Vref), the first amplifier being provided so as to restore the behavior of the current mirror (M2, M1) generating a positive current when the output voltage of the device approaches the feed voltage (VDD) and the second amplifier being provided so as to restore the behavior of the current mirror (M4, M3) generating a negative current when the output voltage of the device approaches the earth (GND), thus allowing the output current of the device to be always constant and equal to a reference value (Iref).