286 results about "Exclusive access" patented technology

A central processing unit (CPU) having a built-in dynamic random-access memory (DRAM) with exclusive access to the DRAM when the CPU performs an interlock access to the DRAM. A memory controller prevents the DRAM from being externally accessed while the CPU is performing the interlock access. When the memory controller receives an external request for accessing the DRAM during a time when the CPU is performing an interlock access to the DRAM, the memory controller outputs a response signal indicating that external access to the DRAM is excluded or inhibited. The request signal can be a hold request signal for requesting a bus right or can be a chip select signal. The response signal can be a hold acknowledge signal or a data complete signal. The memory controller can be switched to and from first and second lock modes, where hold request and hold acknowledge signals are used during the first lock mode and chip select and data complete signals are used in the second lock mode.

A microprocessor includes multiple register files. In a single thread mode, the microprocessor allows a single thread to have access to multiple ones of the register files. In a multi-thread mode, each thread has access to respective ones of the register files. In the multi-thread mode, multiple threads are simultaneously executing. Circuitry and hardware are provided to facilitate the respective modes and to facilitate transitions between the modes.

A method for controlling exclusive access to a resource shared by multiple processors in a data storage system includes providing a system lock procedure to permit a processor to obtain a lock on the shared resource preventing other processors from accessing the shared resource and providing a faked lock procedure to indicate to the system lock procedure that a processor has a lock on the shared resource where such a lock does not exist, and wherein the faked lock procedure prevents another processor from obtaining the lock on the shared resource, but does not prevent other processors from accessing the shared resource. A data storage system according to the invention includes a shared resource, a plurality of processors coupled to the shared resource through a communication channel, and a lock services procedure providing the system lock procedure and the faked lock procedure. In one embodiment, the shared resource is a cache and the system lock procedure permits a processor to lock the entire cache whereas the faked lock procedure is implemented by a processor seeking exclusive access of a cache slot.

In a multi-domain computer system in which several processes are running, a composite lock provides mutually exclusive access to a resource. The composite lock has a back-end component and a front-end component. The back-end component is platform-dependent and operates as a semaphore, with Wait and Signal functions. The front-end component conditionally calls the Wait and Signal functions depending on whether the lock is currently contested when a new process wishes to acquire the lock, and on whether any process is currently suspended, waiting to acquire the lock. The front-end and back-end components may execute in different domains. In the uncontested case, the invention avoids costly domain crossings. The front-end component may also include a spinning feature to further reduce the need to invoke the back-end component and cause a domain crossing. The composite lock is particularly advantageous in computer systems that include a virtual machine.

A network on chip (‘NOC’) that includes integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controllers, with each IP block adapted to a router through a memory communications controller and a network interface controller, where each memory communications controller controlling communications between an IP block and memory, and each network interface controller controlling inter-IP block communications through routers, with the network organized into partitions, each partition including at least one IP block, each partition assigned exclusive access to a separate physical memory address space and one or more applications executing on one or more of the partitions.

A task synchronization mechanism operates on a global lock that is shared between processors an on local locks that are not shared between processors. The local locks are processor-specific locks. Each processor-specific lock is dedicated to a particular processor in the system. When shared access to a resource is required, a processor updates its processor-specific lock to indicate the processor is sharing the resource. Because each processor-specific lock is dedicated to a particular processor, this eliminates a significant portion of the memory bus traffic associated with all processors reading and updating the same lock. When exclusive access to a resource is required, the requesting processor waits until the count of all processor-specific locks indicate that none of these processors have a lock on the resource. Once no processor has a lock on the resource, exclusive access to the resource may be granted. By changing from a single lock to multiple processor-specific locks, significant performance benefits are achieved by eliminating the memory bus traffic associated with caching a single lock to multiple processors.

Access by multiple hosts, such as computers, to a data storage device by way of a network while maintaining data integrity. In one embodiment, a method for accessing the storage device includes acquiring a resource “lock” that provides exclusive access to one of the hosts at a time. In another embodiment, the file systems of a first and second host provide file system attributes stored in a storage device to provide mutually exclusive access for each host to free blocks of the device. In another embodiment, a networked system contains a first host having exclusive direct access to a storage device over a digital network. A second host requiring access to the storage device communicates with the first host by way of the digital network. File access requests generated by the second host are transferred by a redirection filter driver within the second host to the first host.

The invention provides both interfaces of SAN and NAS, prevents data miss even when a trouble occurs and makes it possible that an arbitrary number of NAS interfaces access the same file system with high performance. A storage system includes multiple interfaces for external connection, multiple disks accessed from multiple interfaces, and a shared memory accessed from multiple interfaces. The multiple interfaces are block interfaces executing disk block I/O request, and file interfaces of file servers executing file I/O request. A file system in the file servers is constructed in a part of the disks, and a log storage area holding change log of the file system, and a management file server information storage area holding information of managing file server performing exclusive access control of file system and management of log storage area are formed in the shared memory.

Some embodiments provide a system including a database, two or more data access objects, and a proxy object. In some such embodiments, each data access object has exclusive access privileges to a subset of data within the database. Further each object includes one or more of a read method that provides access to data and a write method that causes data to be stored. In such embodiments, the proxy object accesses data via data access object methods and includes a valuate method, the execution of which causes data to be passed from a data access object to the proxy object.

A smart passive reference to an object oriented object provides control over creation and deletion of the object it references. A reference count is incremented when an active reference to an object is created, and is decremented when an active reference to the object is deleted. The smart passive reference allows suspending the activity of a thread until no threads have active references to the object. In addition, the smart passive reference can be used to invalidate the smart passive references in other threads, thereby allowing a thread to obtain exclusive access to an object. The smart passive reference also provides an interface to cause the managed object to be deleted when the reference count goes to zero.

A processor includes at least one processing core. The processing core includes a memory cache, a store queue, and a post-retirement store queue. The processing core retires a store in the store queue and conveys the store to the memory cache and the post-retirement store queue, in response to retiring the store. In one embodiment, the store queue and/or the post-retirement store queue is a first-in, first-out queue. In a further embodiment, to convey the store to the memory cache, the processing core obtains exclusive access to a portion of the memory cache targeted by the store. The processing core buffers the store in a coalescing buffer and merges with the store, one or more additional stores and/or loads targeted to the portion of the memory cache targeted by the store prior to writing the store to the memory cache.

Techniques are disclosed for managing resources that are accessible to a plurality of entities. In one embodiment, shared locks on a resource are granted more efficiently by maintaining data that is local to (e.g. on the same node as) each entity to indicate whether an exclusive lock has been granted on the resource to any entity of the plurality of entities. Data that (15) is maintained local to an entity, and that (16) indicates whether any entity has an exclusive lock on a particular resource is referred to herein as a “local exclusive lock flag” for that particular resource. When an entity of the plurality of entities seeks to acquire a shared lock for a particular resource, that entity checks the local exclusive lock flag for that particular resource. If the local exclusive lock flag indicates that no entity holds an exclusive lock on the resource, then the entity seeking the shared lock acquires the shared lock without first receiving a lock grant from the resource manager that manages the resource. In many cases, the resource manager that manages the resource is remotely located relative to the entity that desires the shared lock. Because the local exclusive lock flag is local, the act of checking it does not incur the overhead associated with communicating with a remotely located resource manager. Thus, obtaining a shared lock based on the state of a local exclusive lock flag significantly increases the efficiency of managing access to the resource, particularly for resources for which entities do not frequently require exclusive access.

A method and apparatus is disclosed herein for secure operating system switching. In one embodiment, the method comprises identifying a second operating system of a plurality of operating systems that is to be active next; causing a memory access controller to enable exclusive access to a portion of memory for the second operating system once the second operating system becomes active; and causing the second operating system to become active.

The invention discloses a shared resource scheduling method and system used in distributed parallel processing. The method and system are based on a distributed operation mechanism. The shared resource scheduling units distributed in each processor subsystem are distributed in each shared Resource locks and resource request arbitration units are implemented. These distributed processing units communicate by sending messages (resource access requests/permissions) to each other through the switching unit. The shared resource scheduling unit in the processor subsystem uses virtual queue technology to manage all resource access requests in the data cache, that is, a special queue is specially opened for each accessible shared resource. Resource locks in shared resources are used to ensure the uniqueness of access to shared resources at any time. Resource locks have two states: lock occupation and lock release. The request arbitration unit in the shared resource uses a priority-based fair polling algorithm to arbitrate resource access requests from different processing nodes. The invention can effectively avoid the competition problem when each processing node accesses the shared resource, can also avoid the deadlock of the shared resource and the starvation problem of the processing node, and provides high-efficiency mutually exclusive access to the shared resource.

In a distributed system, a resource such as a storage device is protected by an owner node's exclusive access to it, wherein exclusive access is established via a persistent reservation on the resource. A persistent reservation is never removed, however the owner node's persistent reservation may be challenged in an arbitration process, to take it away from a failed owner node. A challenger node challenges by changing an owner's access key (that establishes the persistent reservation) to a challenge key, delaying, and determining whether the owner restored the owner's access key during the delay, because a properly operating owner replaces a challenge key with its owner access key. If the owner fails to restore its owner access key, the challenger node becomes the new resource owner by replacing the challenge key with an owner access key of the challenger node. The key may include additional information to provide extensibility.

A switched architecture is provided to allow controllers to manage physically independent memory systems as a single, large memory system. The switched architecture includes a path between switches of controllers for inter-controller access to memory systems and input/output interfaces in a redundant controller environment. Controller memory systems are physically independent of each other; however, they are logically managed as a single, large memory pool. Cache coherency is concurrently maintained by both controllers through a shared locking mechanism. Volume Logical Block Address extents or individual cache blocks can be locked for either shared or exclusive access by either controller. There is no strict ownership model to determine data access. Access is managed by the controller in the pair that receives the access request. When a controller is removed or fails, a surviving controller may take appropriate action to invalidate all cache data that physically resides in the failed or missing controller's memory systems. Cached write data may be mirrored between redundant controllers to prevent a single point of failure with respect to unwritten cached write data.

A storage device is coupled to a computing system comprising an operating system and application software. Access to the storage device is blocked by a kernel filter driver, except exclusive access is granted to a first anti-virus engine. The first anti-virus engine is directed to scan the storage device for malicious software and report results. Exclusive access may be granted to one or more other anti-virus engines and they may be directed to scan the storage device and report results. Approval of all or a portion of the information on the storage device is based on the results from the first anti-virus engine and the other anti-virus engines. The storage device is presented to the operating system and access is granted to the approved information. The operating system may be a Microsoft Windows operating system. The kernel filter driver and usage of anti-virus engines may be configurable by a user.

A design structure embodied in a machine readable medium is provided. Embodiments of the design structure include a network on chip (‘NOC’), the NOC comprising: integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controller, each IP block adapted to a router through a memory communications controller and a network interface controller, each memory communications controller controlling communication between an IP block and memory, and each network interface controller controlling inter-IP block communications through routers; the network organized into partitions, each partition including at least one IP block, each partition assigned exclusive access to a separate physical memory address space; and one or more applications executing on one or more of the partitions.

A system for providing differential location service includes a service provider capable of receiving a request for a differential location service that includes a geographic area defined independent of a specific format. The service provider is capable of receiving the request such that the geographic area can be transformed to thereby define the geographic area in a predetermined manner. The system can include a tracking entity capable of sending the request. The system can additionally, or alternatively, include a network entity (e.g., service provider or a tracked entity) capable of entering a subscription including the geographic area defined in the predetermined manner such that the tracking entity has exclusive access rights to modify the subscription. The network entity can also determine whether to provide the requested differential location service based upon a current location of the tracked entity located remote from the tracking entity, and upon the subscription.