The invention relates to a clock?correction technology in the field of microelectronics and discloses a sampling clock?mismatch?background?correction method based on a time-to-digital?converter, which is used for carrying out background?correction on mismatch of a sampling clock?of a time-interleaved analog-to-digital converter and improving performances of the time-interleaved analog-to-digital converter. AND operation is carried out on each adjacent two-phase sampling clock of the time-interleaved analog-to-digital converter, the overlapping part waveform Ai of the adjacent sampling clocks is obtained, a?time domain?waveform width?amplifier is adopted to amplify the width of Ai to obtain Ci, the time-to-digital?converter is used for quantifying Ci to obtain Di, the average value of Di D represents a digital code corresponding to the ideal overlapping width of adjacent two-phase sampling clocks, sampling clock offset in the i channel is obtained through calculation Ei=Di-D, and multiphase?sampling?clock?mismatch?correction can then be realized through Ei statistics and feeding the statistical result to a clock delay?adjustment unit. The sampling clock?mismatch?background?correction method based on time-to-digital?converter is particularly suitable for mismatch correction on the sampling clock of the time-interleaved analog-to-digital converter.