A pixel design for
CMOS image sensors that has a
high frame rate potential and, therefore, provides
motion capture capabilities. The pixel is designed for global electronic shuttering so every pixel is exposed simultaneously to images incident upon the
pixel array plane. The present invention has the advantages of: (1) Allowing the
accommodation of changes in the pixel output groupings for different
monochrome output format or CFA patterns with only changes in
metal routing
layers; (2) allowing true electronic shuttering to image moving scene with all the pixels having the same capture
time windows; and (3) providing a symmetric global
shutter gate and transfer gate to minimize pixel related
fixed pattern noise. The pixel architecture provides for a
CMOS based, active
pixel image sensor comprising an array of pixels formed in rows and columns, with each of the pixels containing at least one active circuit element. There are a plurality of output channels formed such that each of the output channels are operatively connected to a subset of pixels wherein each of the pixel have an attribute that is the same. The pixel architecture also provides an output gate region and a
shutter gate region that are symmetric about the center of the pixel. By arranging the
shutter and transfer gates, a symmetric manner about the center of the pixel, a more efficient transfer of electrons to these gates is provided. A Pixel Output
Bus structure allows configurable connections to column-wise
signal busses that provide parallel output channels.