56results about How to "Reduce the voltage range" patented technology

Systems and methods in accordance with various embodiments can provide for reduced program disturb in non-volatile semiconductor memory. In one embodiment, select memory cells such as those connected to a last word line of a NAND string are programmed using one or more program verify levels or voltages that are different than a corresponding level used to program other cells or word lines. One exemplary embodiment includes using a lower threshold voltage verify level for select physical states when programming the last word line to be programmed for a string during a program operation. Another embodiment includes applying a lower program voltage to program memory cells of the last word line to select physical states. Additional read levels are established for reading the states programmed using lower verify levels in some exemplary implementations. A second program voltage step size that is larger than a nominal step size is used in one embodiment when programming select memory cells or word lines, such as the last word line to be programmed for a NAND string.

The present invention relates to erase and program methods of a flash memory device including MLCs for increasing the program speed. In the erase method according to the present invention, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation.

A high density anti-fuse cell can be built at the cross points of two perpendicular interconnect lines, such as active region lines, active and polysilicon lines, active and metal lines, or polysilicon and metal lines. The cell size can be very small. At least one of the anti-fuse cells have a thin oxide fabricated before, after, or between a diode in at least one contact holes at the cross points of the interconnect lines. The thin oxide of the anti-fuse cells at the cross points can be selected for rupture by applying supply voltages in the two perpendicular lines. In some embodiments, a diode can be created after thin oxide is ruptured so that explicitly fabricating a diode or opening a contact hole at the cross-point may not be necessary.

A battery monitor for monitoring the performance of at least one battery within an array of batteries, comprising: a data acquisition device for measuring at least one parameter of the at least one battery associated with the battery monitor, a first data interface operable to exchange data with a first device, and a second data interface operable to exchange data with a second device.

A rectifier for rectifying alternating current into direct current is described, in which a three-phase generator includes a three-phase stator winding. The phases of the stator winding are triggered via switching elements of a power circuit. The power circuit is controlled via a control part, which includes a controller component. The rectifier includes a control part (control module) having control terminals and a power circuit (power module) controlled by the control module and optionally provided with a cooling device, in which all the power-conducting components are designed as power MOS components and integrated in a stacked construction.

An enhanced piezoelectric wire structure includes an elongated portion of piezoelectric material, a metallic core, and an outer conductive sheath. The metallic core is substantially surrounded by the elongated portion of piezoelectric material and configured to function as a first electrode for the piezoelectric structure. The conductive outer sheath preferably covers selected areas of the elongated portion of piezoelectric material and functions as a second electrode for the structure. The piezoelectric material may correspond to barium titanate ceramic fibers, such that a lead-free structure is effected, however other piezoelectric materials may also be utilized. The disclosed structure can be poled with a reduced poling voltage and lower temperature level, and also requires a reduced voltage potential level required for mechanical actuation. A collection of such piezoelectric structures can be provided together in a modular patch assembly that may be formed in a variety of customized configurations for integration with various environments, and can function as a mechanical actuator device, a condition-responsive device (e.g., a sensor) and / or as a power generation device. When utilized as a power generation device, the subject piezoelectric assembly can power tire electronics components such as a revolution counter, a sensor, a rechargeable battery, a flashing light assembly, a microcontroller, a global positioning system (GPS), and a radio frequency (RF) device.

A programming method of the multi-level flash memory comprises shooting a programming voltage that is increasing upwards stepwise each time into the gate of the multi-level flash memory, and following, shooting a program verify voltage that is decreasing downwards to program a multi-level in the multi-level flash memory and shooting an additional programming voltage into the multi-level flash memory after the last program verify voltage is shot. An erasing method of the multi-level flash memory comprises shooting an erasing voltage that is decreasing downwards stepwise each time into a gate of the multi-level flash memory, and following, shooting a erase verify voltage that is increasing upwards to erase a multi-level in the multi-level flash memory and shooting an additional voltage into the multi-level flash memory after the last erase verify voltage is shot.

An enhanced piezoelectric wire structure includes an elongated portion of piezoelectric material, a metallic core, and an outer conductive sheath. The metallic core is substantially surrounded by the elongated portion of piezoelectric material and configured to function as a first electrode for the piezoelectric structure. The conductive outer sheath preferably covers selected areas of the elongated portion of piezoelectric material and functions as a second electrode for the structure. The piezoelectric material may correspond to barium titanate ceramic fibers, such that a lead-free structure is effected, however other piezoelectric materials may also be utilized. The disclosed structure can be poled with a reduced poling voltage and lower temperature level, and also requires a reduced voltage potential level required for mechanical actuation. A collection of such piezoelectric structures can be provided together in a modular patch assembly that may be formed in a variety of customized configurations for integration with various environments, and can function as a mechanical actuator device, a condition-responsive device (e.g., a sensor) and / or as a power generation device. When utilized as a power generation device, the subject piezoelectric assembly can power tire electronics components such as a revolution counter, a sensor, a rechargeable battery, a flashing light assembly, a microcontroller, a global positioning system (GPS), and a radio frequency (RF) device.

A battery monitor for monitoring the performance of at least one battery within an array of batteries, comprising: a data acquisition device for measuring at least one parameter of the at least one battery associated with the battery monitor, a first data interface operable to exchange data with a first device, and a second data interface operable to exchange data with a second device.

The invention discloses a charge method of a lithium ion power storage battery, relating to the field of charge technology of lithium ion power storage batteries. The charge environmental conditions are as follow: one standard atmospheric pressure, temperature 25 plus or minus 5 DEG C and humidity is less than or equal to 85% RH, and different constant currents are adopted to charge the battery under different voltage limiting stages. Through the charge method, the battery can not be overcharged and can be charged fully, thus having equilibration function. Meanwhile, the voltage range of the current equilibration process is reduced, thus unnecessary circulation loss of a single battery cell can be avoided as much as possible, the problem of charge unbalancedness of a battery pack can be solved and the working performance can be improved.

An automatic transmission bicycle including a bicycle frame, a chain ring, a pair of pedals, a wheel, and a plurality of gears coupled to the bicycle frame. The plurality of gears has a plurality of gear combinations defined by at least two gears cooperatively engaged. The automatic transmission bicycle includes an electric motor coupled to the bicycle frame. The automatic transmission bicycle includes a voltage generator configured to generate a current that has a corresponding voltage dependent upon rotational speed of the wheel. The automatic transmission bicycle includes a gear shifter in electrical communication with the voltage generator and configured to receive the current generated by the voltage generator. The gear shifter shifts between two respective gear combinations from the plurality of gear combinations in response to receiving the current that has a corresponding voltage within a predetermined voltage range.

Erase and program methods of a flash memory device including MLCs for increasing the program speed are described. In the erase method, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation.

An electro-optical device includes pixel electrodes corresponding to intersections of a plurality of scanning lines and a plurality of data lines and specific to the pixels. A common electrode facing the pixel electrode, and A switching element that establishes conduction between the data line and the pixel electrode when a selection voltage is applied to the scanning line. A control circuit that supplies a high voltage having a predetermined value and a low voltage lower than the high voltage alternately at predetermined intervals to the common electrode; A scanning line driving circuit that selects the plurality of scanning lines in a predetermined order and that applies the selection voltage to each of the selected scanning lines; and A data line driving circuit that supplies a data signal defining the grayscale levels of the pixels to the data lines in a period during which one of the scanning lines is selected and during which the voltage applied to the common electrode is maintained at the high voltage or the low voltage and that performs a precharge operation for precharging the plurality of data lines to a predetermined potential in a period of time including a period during which the voltage applied to the common electrode changes from one of the high voltage and the low voltage to the other.

The invention discloses a pixel structure of a high-speed global shutter. According to the pixel structure, innovation is made to the electric structure of a sampling switch, and two sampling capacitors can be independently managed, so that sampling capacitance during charge transfer in the process of reading does not change; in addition, the invention further discloses a signal control method applied together with the pixel structure. The pixel structure and the signal control method thereof have the advantages that voltage amplitude of output signals of the pixel structure can be improved, dynamic range of pixels can be widened, and image gradation quality can be improved; meanwhile, indexes such as CVF, PLS and noise of a typical 8T structure are not changed.

A low power driving method for a display panel and a driving circuit therefor. When the voltage of a corresponding common electrode of a pixel in a pixel array is changed from one of the first voltage and the second voltage to the other thereof according to a polarity signal, the voltage of the corresponding pixel electrode of the pixel is driven. In an embodiment, a data code for the pixel and the polarity signal are utilized to predict a trend of the corresponding target voltage of the data code, and the voltage of the pixel electrode or the data line is changed to a voltage close to the target voltage of the pixel according to the prediction result. Thus, the swing range of the voltage of the data line can be efficiently reduced, and power saving and reduction in transition time can also be achieved.

The invention discloses a global shutter pixel structure for increasing voltage amplitude of an output signal. The global shutter pixel structure is characterized in that the electrical structure of a sampling switch is innovated, two sampling capacitors can be managed independently, and the magnitude of sampling capacitance is kept unchanged during charge conversion in a readout process. In addition, the invention further discloses a signal control method based on the structure. The global shutter pixel structure and the control method have the advantages that the voltage amplitude the output signal of the structure can be increased, dynamic range of pixels is expanded, gray quality of images is improved, and indicators, such as CVF, PLS and noise, of a typical 8T structure are unchanged.

The invention relates to a local phase lock quadrature polarization free space coherent light communication device. The local phase lock quadrature polarization free space coherent light communication device comprises a single frequency single mode laser device, a fiber polarization beam splitter, a fiber stretcher, a first light phase modulator, a second light phase modulator, a data signal generator, a microwave amplifier, a first fiber collimator, a second fiber collimator, a first emission half-wave plate, a second emission half-wave plate, a first polarization beam splitting prism, a third emission half-wave plate, a second polarization beam splitting prism, a first rectangular prism, a first focusing lens, a second focusing lens, a first balance detector, a loop filter, a reception half-wave plate, a third polarization beam splitting prism, a second rectangular prism, a third focusing lens, a fourth focusing lens, a second balance detector and an A / D converter. The device emits coaxial quadrature polarization signal light, realizes self-interference reception at a reception end and can effectively overcome a phase error, a locking phase structure is arranged at an emission end, the structure of the reception end is simplified, and the system communication rate can be flexibly adjusted with no need for adjusting the light path.

A wireless communication unit (100) comprises a voltage controlled oscillator (123) having an active device (450) operably coupled to a first variable capacitance (425) to provide a variable capacitance value based on an applied steering line voltage, and a feedback network comprising a resonator (475), operably coupled to an output of the active device, for feeding power back to an input of the active device to sustain oscillations (123). Notably, a second variable capacitance is operably coupled to receive a control voltage from the steering line (405) and located between the resonator (475) and the active device (450).

A current-amplifying transistor device is provided, between an emitter electrode and a collector electrode, with two organic semiconductor layers and a sheet-shaped base electrode. One of the organic semiconductor layers is arranged between the emitter electrode and the base collector electrode, and has a diode structure of a p-type organic semiconductor layer and an n-type p-type organic semiconductor layer. A current-amplifying, light-emitting transistor device including the current-amplifying transistor device and an organic EL device portion formed in the current-amplifying transistor device is also disclosed.

Systems and methods in accordance with various embodiments can provide for reduced program disturb in non-volatile semiconductor memory. In one embodiment, select memory cells such as those connected to a last word line of a NAND string are programmed using one or more program verify levels or voltages that are different than a corresponding level used to program other cells or word lines. One exemplary embodiment includes using a lower threshold voltage verify level for select physical states when programming the last word line to be programmed for a string during a program operation. Another embodiment includes applying a lower program voltage to program memory cells of the last word line to select physical states. Additional read levels are established for reading the states programmed using lower verify levels in some exemplary implementations. A second program voltage step size that is larger than a nominal step size is used in one embodiment when programming select memory cells or word lines, such as the last word line to be programmed for a NAND string.

An electronic test apparatus, such as an oscilloscope, comprising a logic analyzer frontend, wherein the logic analyzer frontend comprises a digital input port configured to receive a digital signal from a device under test. The logic analyzer frontend further comprises at least one analog-to-digital converter that is arranged downstream of the digital input port, and a digital comparator that is arranged downstream of the analog-to-digital converter. The digital comparator is configured to generate an adjusted digital signal and to provide the adjusted digital signal to further components of the electronic test apparatus. The logic analyzer frontend further comprises a digital correction unit configured to adjust a digital decision threshold value of the comparator.

Erase and program methods of a flash memory device including MLCs for increasing the program speed are described. In the erase method, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation.

In aspects of the invention, there is provided an igniting semiconductor device that can prevent burning of an IGBT or ignition coil, and erroneous ignition, even when reducing the size of a capacitor that generates a self-interrupting circuit time constant. In some aspects, a semiconductor device of the invention is configured of an IGBT and a current control circuit. The current control circuit can be configured of a first series circuit wherein an IGBT and a sense resistor are connected in series, a drive signal control circuit, and a self-interrupting circuit. At a time of abnormal operation, the self-interrupting circuit can output a voltage whose amplitude temporally drops in stages toward 0V to the drive signal control circuit. The drive signal control circuit can control the amplitude of a drive control signal so that the voltage across the sense resistor is equivalent to the output voltage of the self-interrupting circuit.

A high density anti-fuse cell can be built at the cross points of two perpendicular interconnect lines, such as active region lines, active and polysilicon lines, active and metal lines, or polysilicon and metal lines. The cell size can be very small. At least one of the anti-fuse cells have a thin oxide fabricated before, after, or between a diode in at least one contact holes at the cross points of the interconnect lines. The thin oxide of the anti-fuse cells at the cross points can be selected for rupture by applying supply voltages in the two perpendicular lines. In some embodiments, a diode can be created after thin oxide is ruptured so that explicitly fabricating a diode or opening a contact hole at the cross-point may not be necessary.

A booster circuit configured to boost a supplied voltage and provide a booster circuit output includes: an oscillator circuit configured to generate a clock signal; a charge pump circuit configured to provide a charge pump output by boosting the supplied voltage with the use of the clock signal; a detection circuit configured to detect a voltage of the booster circuit output and output a detection signal; and an output circuit configured to connect and disconnect the charge pump output to and from the booster circuit output. The oscillator circuit controls activation and deactivation of an output of the oscillator circuit in accordance with the detection signal, and the output circuit controls disconnection of the output circuit in accordance with the detection signal.

The invention relates to a voltage amplitude limiting circuit for controlling a current supply switch of a current steering analog-to-digital converter (DAC). The voltage amplitude limiting circuit comprises a first switch unit and a second switch unit which are arranged between an output end and a grounding end of the amplitude limiting circuit in parallel, a standard inverter of which the input end is electrically connected with the input end of the amplitude limiting circuit, and a resistance unit and a third switch unit which are arranged between a voltage supply and the output end of the amplitude limiting circuit in parallel, wherein the first switch unit controls the on and off between the output end and the grounding end of the amplitude limiting circuit according to signal voltage of the input end of the amplitude limiting circuit; the second switch unit controls the on and off between the output end and the grounding end of the amplitude limiting circuit according to the signal voltage of the input end of the amplitude limiting circuit; and the third switch unit controls the on and off between the voltage supply and the output end of the amplitude limiting circuit according to the signal voltage of the output end of the standard inverter. By adopting the amplitude limiting circuit provided by the invention, burrs of the output signal of the DAC are reduced; the dynamic performance of the DAC is improved; and an output voltage range of the DAC is increased.

A static synchronous compensator (36) for use in reactive power compensation, the static synchronous compensator (36) comprising at least one primary compensator limb (38) including first and second DC terminals (40, 42), and an AC terminal (44) for connection in use to an AC network (58), the or each primary compensator limb (38) defining first and second limb portions (50, 52), each limb portion (50, 52) including at least one switching element (54) connected in series with a chain-link converter (56) between a respective one of the first and second DC terminals (40, 42) and the AC terminal (44), the switching elements (54) of the first and second limb portions (50, 52) being operable to switch the respective chain-link converters (56) in and out of circuit between the respective DC terminal (40, 42) and the AC terminal (44) and the chain-link converters (56) being operable to generate a voltage waveform at the AC terminal (44); and a secondary compensator limb (46) including at least one DC link capacitor (48) connected between the first and second DC terminals (40, 42), the secondary compensator limb (46) being connected in parallel with the or each primary compensator limb (38).

The invention discloses a high-performance carbon nitrogen compound / polyoxometallate composite material electrochromic device and a preparation method thereof. The electrochromic device comprises a working electrode, an electrolyte and a counter electrode, the working electrode is formed by covering an electrochromic layer on FTO (Fluorine-doped Tin Oxide) glass, and the electrochromic layer is a carbon nitrogen compound / polyoxometallate composite film; the electrolyte is a solution or sol containing active ions Li < + >; the counter electrode is formed by covering a charge balance layer on FTO glass, and the charge balance layer is a metal oxide film. The electrochromic device disclosed by the invention has excellent performance in light modulation, response time and coloring efficiency, and can still be colored and faded in the same polarity voltage range, so that the purpose of saving energy is achieved.

The present disclosure relates to a liquid crystal panel and the driving circuit. The liquid crystal panel includes a plurality of source driving circuits and a plurality of sub-pixel rows extending along a row direction. Each of the sub-pixel rows includes a plurality of sub-pixels of different colors and the sub-pixels are arranged periodically along the row direction. Within one scanning frame, polarity of driving voltage of at least one sub-pixel within the arranging period is opposite to that of other sub-pixels. Each of the source driving circuit includes at least two output ends respectively connecting to at least two sub-pixels having the same polarity of driving voltage within the same scanning frame to provide the driving voltage of the same polarity to the at least two sub-pixels. In this way, the power consumption of the source driving circuit may be reduced.