There are many inventions described herein as well as many aspects and embodiments of those inventions, for example, circuitry and techniques for reading, writing and / or operating a
semiconductor memory cells of a
memory cell array, including electrically floating body transistors in which an electrical charge is stored in the body of the
transistor. In one aspect, the present inventions are directed to one or more independently controllable parameters of a
memory operation (for example, restore, write, refresh), to program or write a data state into a
memory cell. In one embodiment, the parameter is the amount of time of
programming or writing a predetermined data state into a
memory cell. In another embodiment, the controllable parameter is the amplitude of the
voltage of the control signals applied to the gate, drain region and / or source region during
programming or writing a predetermined data state into a memory
cell. Indeed, the controllable parameters may be both temporal and
voltage amplitude. Notably, the memory
cell array may comprise a portion of an
integrated circuit device, for example, logic device (for example, a
microprocessor) or a portion of a memory device (for example, a discrete memory).