47results about How to "Reduce design error" patented technology

A directly loaded passive tension compensator for disk spring is composed of disk spring sets, a locating rotary arm, a shifting rotary arm and a load regualtor. A pair of disk spring sets is mounted in casing with press plate in its front end. Said two rotary arms are mounted to the casing in movable mode. Its rectangular metal base has horizontal and vertical slots. Its advantages are compact structure, high reliability, high utilization rate of disk spring, constant force output, and flexible load regulation.

The invention discloses an integral-type digital temperature sensing circuit. The integral-type digital temperature sensing circuit comprises a PTAT circuit module, a switch, a CTAT current module, anintegrator, a window comparator and a control and conversion logic component. The integrator comprises an integral capacity and an amplifier. The two ends of the integral capacity are connected to aninput end and an output end of the amplifier. The control and conversion logic component comprises a controller, a counter, a temperature calculator and two SPI modules. The circuit has advantages that a low power supply voltage work condition is not considered in the prior art, but the circuit of the invention adapts to the low power supply voltage work condition; a chopper technology is used toreduce a design error; and the circuit has high flexibility and adjustability, and good stability.

The invention discloses a magnetic field generating device and a manufacturing method thereof, and belongs to the technical field of uniform magnetic field generation. The magnetic field generating device comprises a U-shaped frame, armatures and three groups of square Helmholtz coils, the two armatures are symmetrically arranged on the two sides of the U-shaped frame and can move relative to theU-shaped frame, conical quadrangular magnetic heads are arranged at the inner ends of the armatures, the three groups of square Helmholtz coils are sequentially wound on the armatures from inside to outside, and the three groups of square Helmholtz coils are respectively a first-stage square Helmholtz coil, a second-stage square Helmholtz coil and a third-stage square Helmholtz coil. According tothe invention, a uniform magnetic field area with relatively high strength can be generated, and the manufacturing method is simple and reliable.

The invention discloses a terahertz jumper-free microstrip probe monolithic and system-level circuit integrated packaging structure, which is applied to the technical field of circuit packaging. The problem is that the present invention punches holes in the Pi dielectric layer above each chip pad to make a hole-shaped interconnection structure, so that the test pad is connected to the microstrip line without the traditional gold wire bonding jumper structure, and the microstrip line and the interconnection match the microstrip line. The stub connection is used to correct the impedance mismatch introduced by the hole-shaped interconnection structure. Since the hole-shaped interconnection structure and the interconnect matching microstrip stubs are made by high-precision metal atom sputtering technology, good consistency and repeatability can be guaranteed.

The invention relates to a design technology of the uplift bearing capacity of a shallow buried short pile foundation in electric transmission line construction engineering. According to the design method of the uplift bearing capacity on the short pile foundation of an electric transmission line, according to the principle of soil mechanics and shear strength index, pile side friction is established, the lateral friction changes linearly along the buried depths of piles, according to a standard value of the shear strength index, a standard value of pile peripheral friction is calculated, thecharacteristic weight of soil is introduced, thus a design model of the uplift bearing capacity on the short pile foundation based on the probability theory is established, finally, according to the shear strength index of the soil under different geological conditions, classification is conducted, uplift bearing capacity curves of the short piles with different pile diameters and pile lengths aredrawn, and design parameters of the short pile foundation are obtained. The design technology has the advantages that according to an actual pile foundation stress mechanism, the calculation error caused by using constant frictional resistance is avoided, the design error is effectively lowered, the accuracy is improved, and the working efficiency is greatly improved.

The invention discloses a parameter optimization method for terraced field reclamation in consideration of mining subsidence deformation, which includes the following three parts: 1. The method for optimizing the section of terraced fields considering crack filling; 2. The section optimization method for terraced fields considering the change of surface slope; Terrace construction technology for crack filling: First, divide the treatment area into several sections along the length direction of the terrace, the schematic diagram of section division, and then carry out treatment with the section as a unit. The length of each section is determined according to the operating efficiency of the construction machinery.