133results about How to "Precise pattern" patented technology

The present disclosure is directed to a method and system for the localized deposition of a metal layer on a surface. The method involves introducing at least two gaseous reactants to a substrate surface that is locally heated by a laser. The surface is heated to a temperature at which the gaseous reactants undergo a reaction that results in metal crystal growth on the substrate surface. The reaction is maintained for a desired period of time and under desired conditions to produce a localized deposit of a metal layer on the heated zone of the substrate. In some embodiments, the gas outlets and the laser may be moved in a controlled manner so that a metal layer may be deposited in a desired pattern on the substrate surface.

The present invention relates to a method of forming an amorphous carbon film and a method of manufacturing a semiconductor device using the method. An amorphous carbon film is formed on a substrate by vaporizing a liquid hydrocarbon compound, which has chain structure and one double bond, and supplying the compound to a chamber, and ionizing the compound. The amorphous carbon film is used as a hard mask film.

It is possible to easily control characteristics of the amorphous carbon film, such as a deposition rate, an etching selectivity, a refractive index (n), a light absorption coefficient (k) and stress, so as to satisfy user's requirements. In particular, it is possible to lower the refractive index (n) and the light absorption coefficient (k). As a result, it is possible to perform a photolithography process without an antireflection film that prevents the diffuse reflection of a lower material layer.

Further, a small amount of reaction by-product is generated during a deposition process, and it is possible to easily remove reaction by-products that are attached on the inner wall of a chamber. For this reason, it is possible to increase a cycle of a process for cleaning a chamber, and to increase parts changing cycles of a chamber. As a result, it is possible to save time and cost.

The present invention includes a method to use a phase modulating micromirror array to create an intensity image that has high image fidelity, good stability through focus and good x-y symmetry. Particular aspects of the present invention are described in the claims, specification and drawings.

There is disclosed a polymer comprising: at least, a repeating unit of substitutable hydroxy styrene and a repeating unit of substitutable hydroxy vinylnaphthalene which are represented by the following general formula (1). There can be provided a polymer suitable as a base resin of a positive resist composition, in particular, a chemically amplified positive resist composition that can exhibit higher resolution than conventional positive resist compositions, that provides excellent pattern profiles after being exposed and that exhibits excellent etching resistance; a positive resist composition and a patterning process that use the polymer.

A method of manufacturing a patterned film by which an accurately patterned film is formed when film formation is performed by using the AD method. The method includes the steps of: (a) disposing a multilayered mask containing at least one soft mask layer formed of a soft material and at least one hard mask layer formed of a hard material on a substrate or an electrode formed on the substrate; (b) spraying powder formed of a brittle material toward the substrate, on which the multilayered mask has been disposed, and allowing the powder to collide with an under layer to deposit the powder thereon, thereby forming a brittle material layer; and (c) removing the multilayered mask after step (b).

An organic light emitting display device includes: a first substrate; a plurality of organic light emitting diodes on the first substrate; a plurality of spacers spaced apart from each other on sides of light emitting regions corresponding to the plurality of organic light emitting diodes; and a second substrate facing the first substrate and spaced apart from the first substrate at an interval by the plurality of spacers.

A resist material is made of a polymer or copolymer having a cyclic hydrocarbon as a skeletal structure and an alkali-soluble group to which a protective group is attached as a side chain. Because of the protective group, the resist material is insoluble in alkali solution. In addition, an acid generating agent is added to the resist material. When the acid generating agent is irradiated with a radiation ray, an acid is generated from the acid generating agent, and the protective group is detached from the alkali-soluble group by the function of the acid. Therefore, a resist film made of the resist material can be formed in a desired pattern by irradiating the resist film with the radiation ray. Also, because the cyclic hydrocarbon is used as the skeletal structure of the polymer or copolymer, a superior dry-etching resistance is obtained as compared with a conventional resist material in which acrylate resin is used as a skeletal structure, so that there is no probability that a patterned resist film is over-etched or deformed even though the patterned resist film is used as a mask in an etching process.

There is disclosed a bottom resist layer composition for a multilayer-resist film used in lithography comprising, at least, a polymer comprising a repeating unit represented by the following general formula (1). Thereby, there can be provided a bottom resist layer composition that exhibits optimum n value and k value on exposure to shorter wavelengths, excellent etching resistance under conditions for etching substrates, and is promising for forming a bottom resist layer used for a multilayer-resist process such as a silicon-containing bilayer resist process or a trilayer resist process using a silicon-containing intermediate resist layer.

A mask in which a plurality of mask chips are connected to one another via a supporting member, includes: a plurality of first opening sections that are provided in the plurality of mask chips and that correspond to a pattern to be formed; a cutout section provided at at least one of side faces opposing to each other of the mask chips adjacent to each other; a gap section provided at a connected section connecting the mask chips adjacent to each other, the gap section being composed of the cutout section and including a second opening section corresponding to a pattern to be formed; and a block section that is provided at at least one of the mask chips adjacent to each other and that covers the gap section other than the second opening section.

An organic thin film transistor array panel, for an embodiment, includes a plurality of pixel electrodes formed on a top layer to cover organic thin film transistors, with display areas defined by the areas of the pixel electrodes. Accordingly, the aperture ratio of the display device may be increased. A ratio of width to length (W/L) in a channel of an organic thin film transistor may be increased, and thereby on current (Ion) of the organic thin film transistor may be increased. The organic semiconductor may be prevented from overflowing while being formed in holes by an inkjet printing method such that deterioration of thin film transistor characteristics and pixel defects is prevented. The adhesive of the electrophoretic sheet is prevented from penetrating into the organic semiconductor when the electrophoretic display is formed by attaching the electrophoretic sheet to the organic thin film transistor array panel by a lamination method.

A solar cell is provided. The solar cell defines a receiving room in where at least a cell unit is located. A transparent cover plate is placed over the cell unit. In addition, the transparent cover plate includes a base plate and a structured plate which are adhered to each other. Wherein, the base plate is made from inflexible material and the structured plate is made from a photo resin. Moreover, there are pluralities of convex first patterns disposed on the incident surface of the structured plate.

A mask includes a substrate which includes a front side and a back side and is provided with through-holes; and a film which adjusts a shape of the substrate provided above at least one of the front side and the back side of the substrate. A method of manufacturing a mask includes the steps of: providing a substrate having a front side and a back side; forming a film which adjusts a shape of the substrate above at least one of the front side and the back side of the substrate; and drilling through-holes in the substrate.

A method includes a preparation step of preparing a transparent substrate having a precision-polished main surface, a surface shape information obtaining step of obtaining, as surface shape information, height information at a plurality of measurement points on the main surface of the transparent substrate that contacts a mask stage of an exposure apparatus, a simulation step of obtaining, based on the surface shape information and shape information of the mask stage, height information at the plurality of measurement points by simulating the state where the transparent substrate is set in the exposure apparatus, a flatness calculation step of calculating, based on the height information obtained through the simulation, a flatness of the transparent substrate when it is set in the exposure apparatus, a judging step of judging whether or not the calculated flatness satisfies a specification, and a thin film forming step of forming a thin film as serving as a mask pattern, on the main surface of the transparent substrate whose flatness satisfies the specification.

A method for fabricating an organic thin film transistor includes forming a gate electrode on a substrate, forming a gate insulating layer on the substrate including the gate electrode, forming an organic active pattern on the gate insulating layer using a rear exposing process, and forming source and drain electrodes on the organic active pattern.

A semiconductor process is described as follows. A plurality of dummy patterns is formed on a substrate. A mask material layer is conformally formed on the substrate, so as to cover the dummy patterns. The mask material layer has an etching rate different from that of the dummy patterns. A portion of the mask material layer is removed, so as to form a mask layer on respective sidewalls of each dummy pattern. An upper surface of the mask layer and an upper surface of each dummy pattern are substantially coplanar. The dummy patterns are removed. A portion of the substrate is removed using the mask layer as a mask, so as to form a plurality of fin structures and a plurality of trenches alternately arranged in the substrate. The mask layer is removed.

Disclosed herein is a production method of a semiconductor device having multilayer interconnections of well-formed dual damascene structure in the low dielectric constant interlayer insulating film.

The method includes a step of forming on an underlayer wiring a first insulating film, a second insulating, and first mask forming layer; a step of forming a first resist mask (20) having an inverted pattern of wiring trenches for the upper wiring; a step of etching the first mask forming layer through the first resist mask, thereby forming in the first mask forming layer a concave part conforming to the inverted pattern of wiring trenches for the upper wiring, and then forming on the first mask forming layer a second mask forming layer, thereby filling the concave part with the second mask forming layer; a step of selectively removing the second mask forming layer on the region in which the wiring trench is formed, thereby forming the second mask having the wiring trench pattern; a step of forming on the first mask forming layer a second resist mask (12) having an opening pattern of the via holes; a step of etching the first mask forming layer and the second insulating film through the second resist mask, thereby forming the via holes. This process is followed by the ordinary procedure to form the dual damascene structure.

The preferred embodiment of the present invention provides a transistor structure and method for fabricating the same that overcomes the disadvantages of the prior art. In particular, the preferred structure and method results in lower leakage and junction capacitance by using raised source and drains which are partially isolated from the substrate by a dielectric layer. The raised source and drains are preferably fabricated from the same material layer used to form the transistor gate. The preferred method for fabricating the transistor uses hybrid resist to accurately pattern the gate material layer into regions for the gate, the source and the drain. The source and drain regions are then connected to the substrate by growing silicon. The preferred method thus results in an improved transistor structure while not requiring excessive fabrication steps.