100results about How to "Inhibition of characteristic changes" patented technology

An insulator substrate (110) is provided with a display pixel region (200) comprising an electroluminescence element (160) having a cathode (167), emissive layer (166), and anode (161), and with first and second TFTs for driving the element. Surrounding the display pixel region (200), a peripheral drive circuit region (251) having a third TFT for driving each pixel is further provided on the insulator substrate (110). The cathode (167) is disposed in a region other than the peripheral drive circuit region (251). With this arrangement, generation of a back channel by applying the EL element potential to the cathode is prevented in a complementary TFT employed in the peripheral drive circuit region for controlling the display region, thereby suppressing changes in threshold values due to such back channel generation. As a result, an EL display device with reduced generation of penetration current and minimized increased current consumption is achieved.

A semiconductor memory comprises: a first conductivity type semiconductor substrate and one or more memory cells each constituted of an island-like semiconductor layer having a recess on a sidewall thereof, a charge storage layer formed to entirely or partially encircle a sidewall of the island-like semiconductor layer, and a control gate formed on the charge storage layer, wherein at least one charge storage layer of said one or more memory cells is partially situated within the recess formed on the sidewall of the island-like semiconductor layer.

A semiconductor integrated circuit has: a substrate; a basic logic cell placed on the substrate and configured to function as a part of a logic circuit; and a dummy cell placed on the substrate and not configured to function as a part of a logic circuit. The basic logic cell includes a diffusion layer formed in the substrate, and a distance from the diffusion layer to a boundary between the basic logic cell and another cell adjacent to the basic logic cell is equal to a first distance. The dummy cell includes a dummy diffusion layer that is a diffusion layer formed in the substrate, and a distance from the dummy diffusion layer to a boundary between the dummy cell and another cell adjacent to the dummy cell is equal to the first distance.

A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

There is provided a magnetic antenna, suitable for use in an RFID tag and an RFID tag reader / writer, which operates stable even if brought close to a metallic object and suitable for mass-production, and a board mounted with the magnetic antenna. The magnetic antenna has a coil comprising a magnetic layer and a conductive layer provided on the magnetic layer via an insulating layer. Alternatively, the magnetic antenna has a plurality of coils each comprising a magnetic layer having a square or rectangular shape and arranged radially. One ends of the coils are connected in series or parallel to one another by the magnetic layers thereof such that the coils have the same polarity. An insulating layer is provided on one or both outer surface of the coils, and a conductive layer is provided on an outer surface of at least one of the insulating layers. The magnetic antenna is produced using an LTCC technology.

A plasma processing apparatus includes a vacuum processing chamber, a plasma generating unit having a first power source, a gas supply unit, a lower electrode having a sample table surface for holding a sample in the vacuum processing chamber, and a vacuum pumping unit. The apparatus further includes a plate disposed at a position opposed to the sample table surface, a disc electricity conductor disposed in contact with the plate, a second power source for applying an RF frequency bias power to the disc electricity conductor, and a unit for controlling a temperature of the plate to a predetermined value. The plate is made of silicon or carbon at high purity, and the disc electricity conductor and the plate have a plurality of holes for introducing processing gas from the gas supply unit into the vacuum processing chamber.

A nitride semiconductor device 2 comprises a nitride semiconductor layer 10. A gate insulating film 16 is formed on the surface of the nitride semiconductor layer 10. The gate insulating film 16 includes a portion composed of an aluminum nitride film 15 and a portion composed of an insulating material 14 that contains at least one of oxygen or silicon. A region W2 of the nitride semiconductor layer 10 facing the aluminum nitride film 15 is included in a region W1 of the nitride semiconductor layer 10 facing a gate electrode 18. The nitride semiconductor device 2 may further comprise a nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may be stacked on the surface of the nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may have a larger band gap than that of the nitride semiconductor lower layer 8 and have a heterojunction formed there between.

The invention relates to an organic light emitting diode driving circuit adaptive for preventing organic light emitting diode driving equipment characteristic changes and an organic light emitting diode display employing the drive circuit. The organic light emitting diode drive circuit includes an organic light emitting diode which emits light with a current, a first transistor, a second transistor and a stress compensation circuit. The first transistor supplies a data voltage to a first node in response to a scan pulse. The second transistor controls a current flowing in the organic light emitting diode by the data voltage on the first node. The stress compensation circuit discharges the first node in response to a reset pulse. The organic light emitting diode driving circuit is adaptive to compensate characteristic changes of the organic light emitting diode drive circuit.

Disclosed is a method of manufacturing a semiconductor device. The method includes forming an oxide-nitride-oxide (ONO) layer over a semiconductor substrate, and forming a recess over the semiconductor substrate by etching the ONO layer, forming a vertical structure pattern being higher than the ONO layer over the recess, sequentially forming a spacer oxide film and a first gate poly over the side wall of the vertical structure pattern, and forming a nitride film spacer at a partial region of the side wall of the first gate poly, removing the nitride film spacer, and forming a second gate poly in a spacer shape over the side wall of the first gate poly, and forming a first split gate and a second split gate, symmetrically divided from each other, by removing the vertical structure pattern. The invention can prevent the characteristic between the memory units based on the registration photoetching precision change in photolithography.

The method for fabricating the semiconductor device includes the steps of: forming an insulating film 20, a conductive film 22 and an insulating film 24 over a semiconductor substrate 10 having a first to a third region; removing an insulating film 24, the conductive film 22 and an insulating film 20 formed in the second region and the third region; forming an insulating film 38 in the second region and the third region; removing the insulating film 24 in the first region and the insulating film 38 in the third region; forming an insulating film 44 in the third region; after a conductive film 52 has been formed, patterning the conductive films 22, 52 in the first region to form a gate electrode 58; and patterning the conductive film 52 to form gate electrodes 62 in the second region and the third region while removing the conductive film 52 over the gate electrode 58.

There is provided a magnetic antenna, suitable for use in an RFID tag and an RFID tag reader / writer, which operates stable even if brought close to a metallic object and suitable for mass-production. The magnetic antenna has a coil comprising a magnetic layer and a conductive layer provided on the magnetic layer via an insulating layer. Alternatively, the magnetic antenna has a plurality of coils each comprising a magnetic layer having a square or rectangular shape and arranged radially. One ends of the coils are connected in series or parallel to one another by the magnetic layers thereof such that the coils have the same polarity. An insulating layer is provided on one or both outer surface of the coils, and a conductive layer is provided on an outer surface of at least one of the insulating layers. The magnetic antenna is produced using an LTCC technology.

A resonator device includes a base substrate having a fixation section to be attached to a mounting board and a free end, a resonator element having one end connected to a connection section located on the free end side of the base substrate, and a lid member adapted to airtightly seal the resonator element in a space between the lid member and the base substrate.

A thin-film device comprises a substrate and a capacitor provided on the substrate. The capacitor incorporates: a lower conductor layer; a dielectric film a portion of which is disposed on the lower conductor layer; and an upper conductor layer disposed on the dielectric film. The lower conductor layer has a top surface, a side surface, and a corner portion formed by the top and side surfaces. The upper conductor layer incorporates an upper electrode portion having a bottom surface opposed to the top surface of the lower conductor layer with the dielectric film disposed in between. When seen from above the upper conductor layer, the periphery of the bottom surface of the upper electrode portion is located inside the periphery of the top surface of the lower conductor layer without touching the periphery of the top surface of the lower conductor layer.

Provided a display device including a thin film transistor. The thin film transistor includes a gate electrode, a gate insulating layer which covers the gate electrode, an oxide semiconductor film above the gate insulating layer, a source electrode and a drain electrode which are respectively provided in contact with a first region and a second region, which are provided in the upper surface of the oxide semiconductor film, and a channel protective film which is provided in contact with a third region between the first region and the second region. In plan view, a region of the oxide semiconductor film, which overlaps with the gate electrode, is smaller than the third region, and a portion of the oxide semiconductor film except for a portion which overlaps with the gate electrode has a resistance lower than the portion.

An antenna combined with a terminal housing is disclosed. The disclosed antenna includes an outer frame radiator, which is joined to a side wall of the terminal housing, and an inner frame radiator, which has one end joined to a first point on the outer frame radiator and the other end joined to a second point on the outer frame radiator, and which forms a loop by joining the outer frame radiator, where a feed signal is provided to the inner frame radiator. The disclosed antenna provides the advantages of preventing property changes caused by contact between a person's body and the terminal, and of minimizing mounting space while maintaining stable characteristics.

A liquid ejecting head includes: a plurality of pressure generating chambers communicating with nozzles through which a liquid is ejected; a manifold communicating with the plurality of pressure generating chambers; a flexible member that has a surface on one side which defines at least a part of a wall of the manifold, that has a surface on the other side, on which an adhesive layer is formed, and that has a compliance region, which is able to perform deflection in response to pressure fluctuation in the manifold, in a region in which the adhesive layer is formed; a compliance space disposed on a side opposite to the manifold through the flexible member; a cap member facing the flexible member through the compliance space; and a frame-like member that is disposed between the flexible member and the cap member and has a cantilever, in which the cantilever is fixed to at least a part of the flexible member of the compliance region and has an unfixed region which is not fixed to the cap member on the distal end side thereof.

Provided is a method of manufacturing a piezoelectric vibrator including: forming integrally a vibrator piece and a frame surrounding the vibrator piece on a first wafer and forming bonding films on the both surfaces of the frame; forming a through-hole at a position corresponding to the frame of the first wafer in any one of a second wafer and a third wafer; sticking the second wafer and the third wafer on the both surfaces of the first wafer, respectively; and cutting the stuck wafers at a predetermined position. Here, the forming of the vibrator piece and the frame includes forming a non-bonding film area smaller than the through-hole at a position corresponding to the through-hole of the bonding film, and the cutting of the wafers includes cutting the wafers such that the non-bonding film area is divided.

There is provided a piezoelectric element which includes a first electrode, a piezoelectric layer which is formed on the first electrode by using a solution method, and is formed from a compound oxide having a perovskite structure in which potassium, sodium, and niobium are provided, and a second electrode which is provided on the piezoelectric layer. A cross-sectional SEM image of the piezoelectric layer is captured at a magnification of 100,000. When evaluation is performed under a condition in which a measured value in a transverse direction is set to 1,273 nm, two or more voids are included in the piezoelectric layer, a difference between the maximum value and the minimum value among diameters of the voids to be largest in a film thickness direction is equal to or smaller than 14 nm, and the maximum value is equal to or smaller than 24 nm.

The object of the present invention is to realize high efficiency and improved productivity at the same time. A photoelectric conversion device comprises a unit having a semiconductor structure, the unit comprises: a conductive first impurity semiconductor layer; a conductive second impurity semiconductor layer reverse to the conductive first impurity semiconductor layer; and a semiconductor layer comprising a crystal region over the first impurity semiconductor layer and the second impurity semiconductor layer in an amorphous structure. The flow ratio of the dilution gas is set more than 1 time and less than 10 times of the semiconductor material gas, preferably setting more than 1 time and less than 6 times, and leading in a reaction space to generate plasma to form a semiconductor layer comprising a crystal region.

A display device includes: a first display panel including a display area and a peripheral area, a flexible film disposed in the peripheral area, a thin film transistor disposed on the display area while being adjacent to the flexible film, a second display panel facing the first display panel and a sealant disposed in the peripheral area of the first display panel to attach the first display panel and the second display panel, and the first display panel includes: a substrate, a data wiring layer disposed on the substrate and in contact with a side end of the flexible film, a semiconductor layer disposed on the data wiring layer, an interlayer insulating layer disposed on the semiconductor layer and a gate wiring layer disposed on the interlayer insulating layer.

The invention provides a film transistor, a pixel structure, a display substrate, a display panel and a display device. The film transistor comprises a source electrode and a drain electrode. The center point of the source electrode and the center point of the drain electrode are symmetrical to each other in shape, and the source electrode and the drain electrode are not parallel in shape. The source electrode and the drain electrode of the film transistor are not parallel in shape, that is to say, the source electrode and the drain electrode are curves or multi-segment lines but not straight lines. Such source and drain electrodes enables the ratio of width to length (W / L) of the film transistor to be increased. In this way, the charging time for a pixel structure, charged by a data line, included in the film transistor is reduced, and the display demand is met. Meanwhile, the center point of the source electrode and the center point of the drain electrode are symmetrical to each other, so the characteristics of the film transistor are prevented from changing during switching between positive and negative frames, the sustaining voltage of pixels keeps unchanged, and unsteady flickering is avoided.

An oxide transistor includes: a channel layer formed of an oxide semiconductor; a source electrode contacting a first end portion of the channel layer; a drain electrode contacting a second end portion of the channel layer; a gate corresponding to the channel layer; and a gate insulating layer disposed between the channel layer and the gate. The oxide semiconductor includes hafnium-indium-zinc-oxide (HfInZnO). An electrical conductivity of a back channel region of the channel layer is lower than an electrical conductivity of a front channel region of the channel layer.

A light exposure unit includes: a board on which to mount light-emitting elements; an optical system configured to cause light emitted from the light-emitting elements to converge; a support member holding the board and the optical system; and a heat sink member configured to dissipate heat from the optical system.

Provided is a semiconductor device in which occurrence of humps can be suppressed and variations in characteristics of the semiconductor device can be suppressed. The semiconductor device includes: an element isolation film (200) formed in a semiconductor layer, the element isolation film (200) defining an element formation region; a gate electrode (130) formed above the element formation region, the gate electrode (130) having ends respectively extending above the element isolation film (200); and impurity regions (110) which are to be a source region and a drain region which are formed in the element formation region so as to sandwich therebetween a channel formation region immediately under the gate electrode (130), the gate electrode (130) including at each of the ends thereof a high work function region (124) in which work function is higher than work function in other regions over at least a part of an interface between the element formation region and the element isolation film (200).

A light exposure unit includes: a board on which to mount light-emitting elements; an optical system configured to cause light emitted from the light-emitting elements to converge; a support member holding the board and the optical system; and a heat sink member configured to dissipate heat from the optical system.

The invention relates to a graphite heater furnace, in particular to a graphite heater furnace with multiple levels of graphite heating bodies of heating rods which are arranged in the horizontal direction inside a heating space part of a furnace body and capable of forming uniform temperature distribution on a burned object and improving the burning quality of the burned object. In order to realize the purpose, the graphite heater furnace comprises a housing, a furnace body which is arranged inside the housing and composted of an insulation body and graphite heating body which is arranged in a heating space part inside the furnace body and can produce heat, wherein the graphite heating bodies are horizontally arranged and distributed in multiple levels, the burned object is arranged on the heating rods in the heating space part inside the furnace body, and the outer periphery of the furnace body is provided with a cooling water trough.

A liquid ejecting head includes: a plurality of pressure generating chambers communicating with nozzles through which a liquid is ejected; a manifold communicating with the plurality of pressure generating chambers; a flexible member that has a surface on one side which defines at least a part of a wall of the manifold, that has a surface on the other side, on which an adhesive layer is formed, and that has a compliance region, which is able to perform deflection in response to pressure fluctuation in the manifold, in a region in which the adhesive layer is formed; a compliance space disposed on a side opposite to the manifold through the flexible member; a cap member facing the flexible member through the compliance space; and a frame-like member that is disposed between the flexible member and the cap member and has a cantilever, in which the cantilever is fixed to at least a part of the flexible member of the compliance region and has an unfixed region which is not fixed to the cap member on the distal end side thereof.

A semiconductor device comprising: a first insulating film formed on a semiconductor substrate; a semiconductor layer at least a part of which is formed on the first insulating film; a second insulating film comprising a non-doped silicon oxide film and formed on the semiconductor layer; a third insulating film comprising a silicon oxide film containing at least phosphorus formed on the second insulating film; and a fourth insulating film comprising a non-doped silicon oxide film formed on the third insulating film.