43 results about "Plesiochronous digital hierarchy" patented technology

The invention refers to a method of transmitting Ethernet data frames from a first local area network (LAN) to a second local area network (LAN) comprising mapping Ethernet frames from the first local area network onto Plesiochronous Digital Hierarchy format via Generic Framing Procedure (GFP) and transmitting the mapped Ethernet frames via a one or multiple En streams to an optional SDH-level network. The transmission is received at the second local area network through the optional SDH-level network via one or multiple En streams-network, and the Ethernet frames are demapped from the first local area network via Generic Framing Procedure, and transmitted into the second local area network.

The embodiment of the invention provides a system and an implementation method of a time synchronization network based on a synchronous digital hierarchy (SDH). The system comprises a master clock, an SDH module and a slave clock, wherein the master clock is used for providing a standard time signal for the whole time synchronization network; the SDH module is connected to the master clock and used for receiving and sending the standard time signal which is provided by the master clock; and the slave clock is connected to the SDH module and used for receiving the standard time signal, which is transmitted by the SDH module, of the master clock, and performing synchronization and time setting. By fully utilizing the existing communication resources, the system operates in a real communication network environment and can be adapted to inversion of an SDH network without influence on indexes of the synchronization network. The synchronization accuracy of the system can be completely the same as that of a tracking satellite, and the accuracy of time synchronization is obviously improved and can be less than 1 microsecond, which is a front index of a ground time synchronization network.

A multiplexer / demultiplexer (MUX / DEMUX) system for multiplexing and demultiplexing information from a plurality of traffic channels is configured according to a Plesiochronous Digital Hierarchy (PDH) standard into a composite signal transferred to and from a telecommunciations interface (140). A PDH traffic interface (112) receives PDH channel signals from a plurality of PDH channels and a bit-pipe interface (118) receives bit-pipe traffic transported as a packet data stream. A composite signal generation module and interface (124) then creates, outputs and receives a single composite serial data stream including, in a single composite format, informationfrom the received PDH channel signals as well as the packet data stream. The rate of the bit-pipe traffic may be adaptively modulated as a function of the composite rate.

New layer of data link layer protocol - data link procedure (DLP) is introduced between IP of network layer and PDH in physical layer in the invention to realize syncretizing adaptation between Internet and PDH in order to overcome shortage of current adaptation technique. The method possesses features are: high efficiency of forwarding IP packets, safety and reliability, flux engineering capability, 50 ms protected rearrangement function, realizing exchange between PDH circuit and optical wavelength directly, and realizing compatibility between 1Pv4 and IPv6 networks and compatibility to packet voice network. Using safety mechanism, network control management mechanism, flow management mechanism provided by DLP realizes safety management, control management and flow management for IP network. The method makes current IP network transits to united telecom public network in next generation smoothly.

An apparatus for and a method of integrating switching and transferring of synchronous optical network / synchronous digital hierarchy (SONET / SDH), plesiochronous digital hierarchy (PDH), and Ethernet signals, which integrate and provide connection of synchronous digital (SONET / SDH) signals, plesiochronous digital (PDH) signals, and Ethernet signals, mutually change the synchronous digital (SONET / SDH) signals, the plesiochronous digital (PDH) signals, and the Ethernet signals, packet switching, synchronous timeslot switching, and channel configuration management and control functions in one system. Thus, packet switching capacity, timeslot switching capacity, and packet / timeslot bridging capacity can be enlarged and configured according to corresponding application. Also, a distinctive service compared to a service provided by a separate Ethernet device or a SONET / SDH network device can be provided through a packet / timeslot bridge. In addition, varied and reliable communication service at a moderate price can be provided to service users, and decreased investment and maintenance fee can be provided to carrier service providers.

The invention discloses an FPGA (field programmable gate array) detection method for fiber-cut and power-cut alarming of a PDH (plesiochronous digital hierarchy) device, which relates to a PDH system and comprises the following steps: a, an idle channel is appointed between a first device and a second device which are connected through optical fiber and is used as a dedicated channel, and the first device and the second device are both PDH devices; b, the first device can emit a power-cut alarming signal through the dedicated channel when the first device is powered down; c, the second device detects the alarming signal through the FPGA and distinguishes that the first device is fiber-cut or power-cut by combining the no-light alarming information received by an optical module provided by the second device; if the power-cut alarming signal is detected, and then the no-light alarming information is received, and thus the first device can be judged in a power-cut condition; and if only the no-light alarming information is received, but the power-cut alarming signal is not detected, and thus the first device can be judged to be in a fiber-cut condition. According to the method, the influence that the alarming signal is mixed up with messy codes is avoided, the situation that whether the opposite terminal device connected with the optical fiber is in fiber-cut condition or in a power-cut condition can be accurately distinguished, and the failure recovery time can be saved.

A system and method are provided for transporting Plesiochronous Digital Hierarchy (PDH) tributaries. The method accepts a plurality of PDH tributaries; generates a serial data stream of interleaved PDH tributaries; generates a serial control stream of signals for recovering the PDH tributaries; and, generates a clock signal for timing the data and control streams. The serial data stream of interleaved PDH tributaries is loaded into the payload of a data frame structure. Likewise, the serial control stream is loaded into the payload of a control frame structure. The data bytes of the serial data stream and the control bytes of the serial control stream are both transmitted at the same data rate. That is, there is a control byte generated for each data byte. Thus, the control bytes in the control frame structure are aligned with corresponding data bytes in the data frame structure.

The invention refers to a method of transmitting Ethernet data frames from a first local area network (LAN) to a second local area network (LAN) comprising mapping Ethernet frames from the first local area network onto Plesiochronous Digital Hierarchy format via Generic Framing Procedure (GFP) and transmitting the mapped Ethernet frames via a one or multiple En streams to an optional SDH-level network. The transmission is received at the second local area network through the optional SDH-level network via one or multiple En streams-network, and the Ethernet frames are demapped from the first local area network via Generic Framing Procedure, and transmitted into the second local area network.

Asynchronous / plesiochronous digital hierarchy (PDH) signals, such as DS1 and E1, are transported using virtual concatenation. The packetized data signals are frame encapsulated and subsequently inverse multiplexed into a plurality of PDH frames. An overhead packet is inserted in the transmitted frames to enable the receiver to determine the status of the frames and extract the differential delay experienced by various frames as they are routed through virtually concatenated channels. The extracted delays enables the receiver to realign the various frames of the PDH signal to reconstitute the originally transmitted signals that travel through different paths of the transport network linking the source and sink of the virtually concatenated channel.

The invention discloses a signal warning device for standard frequency offset in a synchronous digital system, and relates to a PDH signal mapping SDH which is invented to resolve the prior problem of the dependence on replacing high-class oscillator to produce the alarm signal. The device that produces the alarm signal for standard frequency offset in the SDH first works out the high-frequency clock frequency value which is then divided by the standard PDH frequency value to obtain an integral part and a remainder part, and then, an enumerator counts the high-frequency clock value, and a comparator exports the alarm signal when the count value arrives at the numerical value of the integral part, and at the same time, an accumulator adds the accumulated value to the remainder part; when the accumulator overflows, an overflow processor controls the numerical value of the integral part in the comparator to be added with one. The device uses the high-frequency clock to produce the alarm signal, and saves the original high-class oscillator, thereby reducing the system cost. The invention is mainly used to produce AIS signal of PDH when PDH signal loses.

The invention discloses convergent type Ethernet over plesiochronous digital hierarchy (EoPDH) network bridge equipment and a data transmission method thereof. The transmission process of up data in the method comprises the steps that: E1 digital signals sent by n E1 interfaces of a line interface module are simultaneously received at each E1-media access control (MAC) module end, the received E1 digital signals are converted to Ethernet data packets and then are successively sent to an Ethernet exchange chip through one Ethernet interface, and the Ethernet data packets are forwarded to a server side by the Ethernet exchange chip; and the transmission process of down data comprises the steps that: when the Ethernet data packets issued by the Ethernet exchange chip are received at each E1-MAC module end, the Ethernet data packets are converted to the E1 digital signals, then are copied for n copies, and are respectively sent to the corresponding n E1 interfaces, and afterwards, the signals are processed by the line interface module and are transmitted to a client side through a transmission line. The convergent type EoPDH network bridge equipment and the data transmission method thereof have the advantages that the implementation difficulty of the equipment is reduced, FPGA (field programmable gate array) resources are saved, and more E1 access quantities can be achieved.