The invention discloses a GPS capture circuit based on optimization parallel code phase search. The GPS capture circuit comprises a down conversion circuit, a down sampling circuit, a fast Fourier transform circuit, a delay circuit, a C / A code generating circuit, an inverse Fourier transform circuit, a coherent integration circuit, a modulus circuit, a non-coherent integration circuit and a threshold decision circuit. In IFFT operation, output data reordering is prevented, and ultimately position bit inversion is simply carried out on the position of the maximum peak-to-average ratio to acquire the received signal C / A code phase. The memory consumption in an IFFT module is saved. According to the invention, the GPS capture circuit can be used to capture any GPS satellite signal; in the case of abundant hardware resources, the capture speed is doubled without changing the frequency search step; the cold start capture time is 1.17 seconds; the hot start capture time is less than 0.5 second; the capture sensitivity can reach -145dBm; and capture can be completed when signals are very weak.