68 results about "Electrostatic Discharge Testing" patented technology

This invention is an electrostatic discharge testing circuit that can deliver current pulses to a component under test (CUT) with a custom amplitude versus time profile shape. Pulse generation with customized shapes is accomplished by discharging an energy storage network comprised of capacitor(s), transmission line(s) and other passive components. Current pulses compliant to the European International Electrotechnical Commission IEC 61000-4-2 standard can be so produced. These current pulses are delivered to the CUT with low distortion through a constant impedance electrical path, such as a combination of cables and controlled impedance conductors of printed wiring boards compatible with packaged IC devices, assemblies, and wafer probes. The current pulses can be delivered with various impedances, and measurements made that allow the CUT currents and voltages to be calculated.

A kind of Electrostatic Discharge (ESD) test installation, it includes a static gun, a control arm and a control module. The static gun has a gun body and a gun gunpoint, the gunpoint aim at a tested module to do a discharge test. The control arm links with the gun body. The control module electric links with the control arm to control the control arm to do discharge test to the static gun.

An electrostatic discharge testing device and method is used for searching the failed objects in testing among the substances to be tested. Firstly, the substance to be tested is placed on a testing platform provided with a plurality of wires. Secondly, one of these wires is provided with the static pulse. Finally, if the substance to be tested makes a false move, the region of the corresponding wire among the substances is featured by a failed test object.

The present invention provides a system and method for electrostatic discharge (ESD) testing. The system includes a circuit that has a switch coupled to an input / output (I / O) circuit of a device under test (DUT), a charge source coupled to the switch, and a control circuit coupled to the switch, wherein the control circuit turns on the switch to discharge an ESD current from the charge source to the I / O circuit, and wherein the circuit is integrated into the DUT. According to the system and method disclosed herein, the system provides on-chip ESD testing of a DUT without requiring expensive and specialized test equipment.

The invention relates to an electrostatic discharge testing circuit and a correlated method thereof. The electrostatic discharge testing circuit comprises a first power source bonding pad, a second power source bonding pad, an RC circuit, a trigger circuit and a bias circuit, wherein the RC circuit comprises a resistor element and a capacitor element; the first power source bonding pad receives a first supply voltage; the second power source bonding pad is used for receiving a second supply voltage different from the first supply voltage; the resistor element is coupled between the first power source bonding pad and a first terminal, and the capacitor element is coupled between the first terminal and a second terminal; the trigger circuit is used for generating an electrostatic discharge triggering signal according to a voltage level between the first terminal and the second terminal; and the bias circuit is used for supplying a bias voltage to the second terminal.

A new circuit for producing simulated electrostatic discharges (ESD) based on the Human Body Model (HBM) is disclosed for testing integrated circuits. HBM ESD test systems provide stress pulses defined by industry standards. The pulses produced by prior art have small imperfections or anomalies. These anomalies can cause incorrect testing to certain devices. The improved ESD HBM test system herein disclosed provides pulses meeting the requirements of industry standards while reducing several anomalies to negligible levels.

Provided is a test bed for accurately measuring an air discharge distance during electronic static discharge (ESD) of an electromagnetic compatibility test for an automobile part system. The test bed for electrostatic discharge testing comprises a control cabinet and a working table. The control cabinet comprises an industrial control computer, a touch display and a stepping motor controller, wherein the industrial control computer comprises an input / output (IO) control card. The working table is electrically connected with the control cabinet. A longitudinal adjusting device, a horizontal adjusting device installed on the longitudinal adjusting device and a height adjusting device connected to the horizontal adjusting device are installed on the working table. The test bed has the advantages that the air electrostatic discharge distance in the electrostatic discharge test can be accurately measured, the displacement can be read accurately, and the displacement precision is 0.1mm; and the moving speed of an electrostatic discharge device is controlled through a stepping motor, the feeding speed can be accurately controlled, and the national standard requirements of 5mm / s can be met.

The invention provides a liquid crystal display panel and a liquid crystal display panel ESD monitoring method. According to the liquid display panel structure, multiple sets of electrostatic discharge testing elements (5) which are horizontally arranged at intervals in the first direction are arranged on the wireless peripheral area of a TFT array substrate (1), each set of the electrostatic discharge testing elements comprises two metal test bars (51) which are oppositely arranged in a spacing mode in the second direction perpendicular to the first direction, the opposite ends of the two metal test bars (51) serve as tips (511), and occurrence of electrostatic discharge is induced easily. Therefore, by means of monitoring of the electrostatic discharge testing elements (5), occurrence of liquid crystal display panel ESD can be monitored continuously in time, occurrence risks of the ESD can be foreseen, and improvement on products can be facilitated.

An equipment (400) for testing semiconductor device performance under high energy pulse conditions, which comprises a high voltage generator (401) and an on / off switch relay (403). The relay is resistively connected by a first resistor (402) to the generator and by a second resistor (404) to the socket (405a) for the device-under-test (406); the relay is operable in a partially ionized ambient. A capacitor (407) is connected to the relay, to the generator, and to the device, and is operable to discharge high energy pulses through the device. A third resistor (410) is in parallel with the capacitor and the device, and is operable to suppress spurious pulses generated by the relay. This third resistor has a value between about 1 kΩ and 1 MΩ, preferably about 10 kΩ, several orders of magnitude greater than the on-resistance of the device-under-test.

Methods, systems, and apparatuses are provided for integrated circuit packages and for enabling electrostatic discharge (ESD) testing of the same. A package includes an integrated circuit chip, a substrate, a first electrically conductive trace, and a second electrically conductive trace. The substrate includes a first electrically conductive region and a second electrically conductive region. The first region is coupled to a first ground signal of the chip, and the second region is coupled to a second ground signal of the chip. The first trace is coupled to the first region and the second trace is coupled to the second region. A portion of the first trace is proximate to a portion of the second trace. An electrically conductive material may be deposited to electrically couple the first and second traces to enable ESD protection testing of the package.

The present invention evaluates the status of discharge or dielectric breakdown having occurred as a result of application of an impulse voltage or current to a test sample by an electrostatic discharge tester. An electromagnetic wave antenna measures a radiation electromagnetic wave signal generated from the electrostatic discharge tester when the electrostatic discharge tester is driven and a radiation electromagnetic wave signal generated from the test sample when discharge or dielectric breakdown occurs. An evaluation section main body obtains and displays a dielectric breakdown occurrence timing TFO after application of the voltage and a dielectric breakdown voltage VFO. The dielectric breakdown occurrence timing TFO is obtained from the time difference between an applied voltage generation time obtained from the radiation electromagnetic wave signal generated when the electrostatic discharge tester was driven and a discharge generation time obtained from the radiation electromagnetic wave signal generated when dielectric breakdown occurred.

The invention relates to a method and a system for monitoring pulse electrostatic discharging testing response of a transmission line. A light emission microscope acquires light emission images of the pulse discharging process of each transmission line while a TLP testing system applies transmission line pulse under different pulse voltage to an electronic element, and each light emission image can be overlapped with optical reflecting images when the test is ended, so as to accurately position an electrostatic discharging channel and a damage point of the electronic element. With the adoption of the method and system, the electroluminescence phenomenon in the pulse electrostatic discharging testing process of the transmission line can be monitored in real time, thus the electrostatic discharging channel in the electronic element under the electrostatic discharging testing process can be clear, the damage point of electrostatic discharging can be timely found out and accurately positioned, and as a result, the weak link of electrostatic resistance of a product can be determined; in addition, the test information can be fully utilized, the test is simple, and good technological support is provided for the study on electrostatic damp of the electronic device and the improvement of ESD design; good engineering application values are achieved.

This invention is an electrostatic discharge testing circuit that can deliver current pulses to a component under test (CUT) with a custom amplitude versus time profile shape. Pulse generation with customized shapes is accomplished by discharging an energy storage network comprised of capacitor(s), transmission line(s) and other passive components. Current pulses compliant to the European International Electrotechnical Commission IEC 61000-4-2 standard can be so produced. These current pulses are delivered to the CUT with low distortion through a constant impedance electrical path, such as a combination of cables and controlled impedance conductors of printed wiring boards compatible with packaged IC devices, assemblies, and wafer probes. The current pulses can be delivered with various impedances, and measurements made that allow the CUT currents and voltages to be calculated.

The invention discloses an electrostatic discharge test structure of a gate-driven MOSFET (metal oxide semiconductor field effect transistor). The structure comprises an MOSFET and an adjustable resistor, wherein the gate of the MOSFET is connected with a gate bonding pad; the source of the MOSFET is connected with a source bonding pad; the adjustable resistor is connected between the gate bonding pad and the source bonding pad; and the resistance value of the adjustable resistor connected to the electrostatic discharge test structure of the gate-driven MOSFET is adjusted according to the requirement on gate offset. The invention also discloses an electrostatic discharge test system of the gate-driven MOSFET. According to the structure and system disclosed by the invention, the space occupied by the electrostatic discharge test structure of the gate-driven MOSFET and the system in the layout design can be effectively reduced, and the layout design efficiency for the electrostatic discharge test structure of the gate-driven MOSFET and the system is improved.

A method for determining a layout which passes testing for electrostatic discharge in a semiconductor device, includes extracting an electrostatic discharge protection network including pads, nets and protective elements; setting start pads and end pads in the electrostatic discharge protection network; finding inter-pad voltages between the start pads and the end pads and electrostatic discharge current paths from the start pads to the end pads; grouping together the electrostatic discharge current paths in the same order; calculating estimated values of electrostatic discharge withstand voltages between the start pads and the end pads and groups to which the start pads and the end pads belong using a negative correlation between the inter-pad voltages and corresponding electrostatic withstand voltages; and determining whether the layout passes testing regarding electrostatic discharge.

The present invention provides a method of repairing a circuit and preventing electronic fuses from burning out during an electrostatic discharge test, the repairing circuit consists of at least one pad forming a partial conduction path between a positive voltage supply (Vq) and a lower voltage supply source (Vss) The electronic fuse constitutes. The repair circuit includes at least one switch device and at least one control circuit. The at least one switching device has a control terminal and is coupled between the Vq pad and the at least one electronic fuse. The at least one control circuit is respectively coupled to the control terminal and the Vq pad. When a positive high voltage is applied to the Vq pad, the control circuit delays the conduction state of the switching device for a predetermined period of time, so as to block the stray current generated when ESD occurs. Therefore, the repair circuit prevents the at least one electronic fuse from being incorrectly programmed.

The invention discloses an air type electrostatic discharge testing device and a testing method, relates to the technical field of electrostatic discharge testing and aims to solve the problems in improving the repeatability of air type electrostatic discharge. The air type electrostatic discharge testing device comprises a holding platform, a bracket, a swinging arm, a discharge gun, an electrostatic generator and a control switch, wherein both the swinging arm and the discharge gun are positioned above the holding platform; the swinging arm extends in a vertical direction; the upper end of the swinging arm is rotationally hinged to the bracket around a horizontal rotating shaft; the discharge gun comprises a discharge gun main body and a gun head; the discharge gun main body is connectedwith the lower end of the swinging arm; the gun head is arranged at one horizontal end, perpendicular to the horizontal rotating shaft, of the discharge gun main body; the gun head faces to the holding platform; the electrostatic generator is electrically connected with the discharge gun main body; the control switch is connected with the discharge gun and / or the electrostatic generator; the control switch is used for controlling the discharge gun and / or the electrostatic generator. The air type electrostatic discharge testing device is used for testing anti-electrostatic properties of equipment.

The present invention provides a system and method for electrostatic discharge (ESD) testing. The system includes a circuit that has a switch coupled to an input / output (I / O) circuit of a device under test (DUT), a charge source coupled to the switch, and a control circuit coupled to the switch, wherein the control circuit turns on the switch to discharge an ESD current from the charge source to the I / O circuit, and wherein the circuit is integrated into the DUT. According to the system and method disclosed herein, the system provides on-chip ESD testing of a DUT without requiring expensive and specialized test equipment.

The application methods in the related art cannot apply a sufficient voltage with a rectangular wave having a short rise time to an electronic circuit. Furthermore, electrostatic discharge test can apply a sufficient voltage but can only apply an oscillating waveform.A TLP generator is used as a rectangular wave generator. The sum of an injection resistance and a matching resistance is set so as to match the characteristic impedance of a transmission line for transmitting a rectangular wave to a test target. A capacitor is connected to a return line of the applied rectangular wave. With this configuration, stable application can be achieved. An error observation function of an electronic circuit gradually increases a peak value of the rectangular wave and determines the immunity based on an application voltage to cause an error for the first time.

A charged device model (CDM) electrostatic discharge (ESD) testing is carried out at wafer level. Wafer CDM pulses are repeatedly applied and monitored. The wafer CDM (WCDM) pulses are accomplished with a probe-mounted printed-circuit board and a high-frequency transformer that captures fast CDM pulses. Modeling of CDM and WCDM in the time and frequency domain illustrates the dominant effects, and shows that WCDM can reproduce all the major phenomena of package-level CDM testing.

An equipment (400) for testing semiconductor device performance under high energy pulse conditions, which comprises a high voltage generator (401) and an on / off switch relay (403). The relay is resistively connected by a first resistor (402) to the generator and by a second resistor (404) to the socket (405a) for the device-under-test (406); the relay is operable in a partially ionized ambient. A capacitor (407) is connected to the relay, to the generator, and to the device, and is operable to discharge high energy pulses through the device. A third resistor (410) is in parallel with the capacitor and the device, and is operable to suppress spurious pulses generated by the relay. This third resistor has a value between about 1 kΩ and 1 MΩ, preferably about 10 kΩ, several orders of magnitude greater than the on-resistance of the device-under-test.

A method for determining a layout which passes testing for electrostatic discharge in a semiconductor device, includes extracting an electrostatic discharge protection network including pads, nets and protective elements; setting start pads and end pads in the electrostatic discharge protection network; finding inter-pad voltages between the start pads and the end pads and electrostatic discharge current paths from the start pads to the end pads; grouping together the electrostatic discharge current paths in the same order; calculating estimated values of electrostatic discharge withstand voltages between the start pads and the end pads and groups to which the start pads and the end pads belong using a negative correlation between the inter-pad voltages and corresponding electrostatic withstand voltages; and determining whether the layout passes testing regarding electrostatic discharge.

The invention discloses an electrostatic discharge testing device and an electrostatic discharge testing method. The electrostatic discharge testing device comprises an oscilloscope and a coaxial line, wherein the coaxial line is used for realizing connection between the oscilloscope and equipment to be tested, and the oscilloscope is used for acquiring electric signals generated by the equipment to be tested in the electrostatic discharge testing process and performing graphical identification on the electric signals. On the basis, the energy of electrostatic discharge in the testing process can be quantified, so that the testing personnel are facilitated to select an ESD device purposefully.

The invention provides a driving circuit, a driving method and a display panel. The driving circuit comprises a level conversion module and a power-on reset module, the level conversion module comprises an overcurrent protection module, an error indicator, a monostable trigger, a counter, a reset / set trigger, a switch unit and a logic control module, and the logic control module comprises a resetpin. During an electrostatic discharge test, if the error indicator monitors that the overcurrent protection module is interfered, an indication signal is output to the monostable trigger, so that themonostable trigger generates a pulse signal and outputs the pulse signal to the reset / set trigger and the counter; when the number of the pulse signals accumulated by the counter is larger than or equal to a threshold value, the reset / set trigger outputs the pulse signals and controls the switch unit to be switched on / off. When the switch unit is switched on, the logic control module is reset, sothat the driving circuit is restarted. Therefore, a black screen phenomenon caused by interference of the over-current protection module during an electrostatic discharge test is solved.

The invention relates to an electrostatic discharge testing circuit and a correlated method thereof. The electrostatic discharge testing circuit comprises a first power source bonding pad, a second power source bonding pad, an RC circuit, a trigger circuit and a bias circuit, wherein the RC circuit comprises a resistor element and a capacitor element; the first power source bonding pad receives afirst supply voltage; the second power source bonding pad is used for receiving a second supply voltage different from the first supply voltage; the resistor element is coupled between the first power source bonding pad and a first terminal, and the capacitor element is coupled between the first terminal and a second terminal; the trigger circuit is used for generating an electrostatic discharge triggering signal according to a voltage level between the first terminal and the second terminal; and the bias circuit is used for supplying a bias voltage to the second terminal.

The present invention relates to the antistatic test technology field, in particular to a coupling plate assembly used for an electrostatic discharge test and an electrostatic discharge test device. The coupling plate assembly used for the electrostatic discharge test comprises a horizontal coupling plate laid on a test table-board, a first coupling plate vertical with the test table-board and a second coupling plate connected with the first coupling plate vertically, and the horizontal coupling plate is also equipped with an insulating plate used for placing a to-be-tested object. The electrostatic discharge test device is equipped with the coupling plate assembly, the coupling plate assembly is connected with a detection circuit, and the detection circuit comprises coupling conducting wires connected with the coupling plate and an electrostatic gun connected with the coupling conducting wires. The electrostatic gun is connected with an electrostatic simulator, and at least one point of each coupling conducting wire is connected with a grounding flat plate. The coupling plate assembly used for the electrostatic discharge test and the electrostatic discharge test device can carry out the omnibearing vertical coupling discharge test on the to-be-tested object, are simple in structure, are convenient to operate, and enables the test efficiency and the test accuracy to be improved.

An electrostatic discharge testing (ESD) apparatus includes a platform, a control unit, an ESD gun, an X rod, a Y rod, and a Z rod respectively parallel to designated XYZ axes of the platform. The Z rod is slidably disposed on the X rod via a first sliding joint, and the Y rod is slidably disposed on the Z rod via a second sliding joint. The ESD gun is disposed on the Y rod. The control unit controls the Z rod to slide along the X rod, and controls the Y rod to slide along the Z rod and along an axis of the Y rod, according to a predetermined testing program. Thus, the ESD gun is moved along a working path to test a product.

The invention relates to an automatic electrostatic discharge detection system which is connected with a plurality of current loops, capable of respectively aiming at each current loop and used for detecting whether the electrostatic discharge conditions of a plurality of electronic devices provided by and serially connected to the current loops are abnormal or not. The electrostatic discharge detection system at least comprises a microcomputer, a plurality of circuit connection ports, a measuring unit, a circuit switching unit, a prompting unit and two grounding wires, wherein when one of the circuit connection ports is switched and connected to the measuring unit, the circuit connection port also keeps electric connection with one of the grounding wires.

The invention discloses an electrostatic discharge test system and test method of a display panel. The electrostatic discharge test system of the display panel includes an electrostatic discharge generator, a gating module, and m parallel output channels, wherein the gating module is electrically connected with the electrostatic discharge generator; and the first end of each output channel is connected in series with the electrostatic discharge generator, and the second end of each output channel is connected with a to-be-detected point of the display panel, an electrostatic discharge test isperformed on the to-be-detected point connected with the corresponding second end. With the electrostatic discharge test system and test method of the display panel of the invention adopted, the automated electrostatic discharge test of a plurality of to-be-detected points of the display panel can be realized; the manual operation of relevant staffs can be replaced; manpower can be saved; workingtime can be shortened; and measurement results have high reliability.