Patents
Literature
Hiro is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Hiro

31 results about "Defect prevention" patented technology

The purpose of Defect Prevention is to identify the cause of defects and prevent them from recurring. Defect Prevention involves analyzing defects that were encountered in the past and taking specific actions to prevent the occurrence of those types of defects in the future.

Gan-Based III-V Compound Semiconductor Light-Emitting Element and Method for Manufacturing Thereof

A GaN-based III-V group compound semiconductor light-emitting element having high light-emitting efficiency and high reliability at a light-emitting wavelength of 440 nm or more is provided.A GaN-based semiconductor laser element 10 has a laminated structure of: a stripe-shaped convex portion 18 made of a surface layer of a sapphire substrate 12, a buffer layer 14 and a first GaN layer 16, and on the sapphire substrate, a second GaN layer 20, an n-side cladding layer 22, an n-side guide layer 24, an active layer 26, a deterioration prevention layer 28, a p-side guide layer 30, a p-side cladding layer 32 and a p-side contact layer 34. The active layer is formed of a quantum well structure including a GaInN barrier layer 36 and a GaInN well layer 38, and a planar crystal defect prevention layer 40 made of an AlGaN layer is provided on the upper surface or lower surface, or between both the surfaces of the barrier layer and the well layer. Upper portions of the p-side contact layer and the p-side cladding layer are formed as a stripe-shaped ridge 42 and a mesa 44 is formed in parallel with the ridge.
Owner:SONY CORP

Method for preventing defects of electric-power information hardware

The invention provides a method for preventing defects of electric-power information software. The method comprises the following steps of: inputting measurement information for the electric-power information at all stages in the life cycle and measurement information of the development process into an AODE prediction model, and calculating the defect densities of all stages; then searching a defect knowledge base of the electric-power information software and acquiring defect introduction reasons and corresponding prevention measures at all the stages; and finally carrying out defect prevention in a targeted manner to reduce the defect density. The method provided by the invention has the advantages that the method and the technical basis can be provided for preventing the defects in construction of an electric information system, the introduction of the defects can be prevented at the early construction of the electric information system, the defect introduction rate can be reduced, the repeated work of 'defect introduction-testing-modification' can be reduced, the targeted property for preventing the defects can be effectively improved, the project development expense of the information system can be saved, the failure risk of a software system can be reduced and the whole construction quality of the electric-power information software can be wholly improved.
Owner:CHINA ELECTRIC POWER RES INST +1

Thin film transistor, manufacturing method thereof, array substrate and display device

The invention discloses a thin film transistor, a manufacturing method thereof, an array substrate and a display device, which belongs to the technical field of thin film transistors. The thin film transistor comprises a substrate, a gate electrode, a gate insulation layer and an active layer. The gate insulation layer comprises an inner defect prevention layer and an interface defect prevention layer, wherein the inner defect prevention layer is located between the interface defect prevention layer and the gate electrode; the inner defect prevention layer is used for reducing inner defects of the gate insulation layer; and the interface defect prevention layer is used for reducing defects of a contact interface between the gate insulation layer and the active layer. Through arranging the gate insulation layer in the above mode, the defect number of the inner part of the gate insulation layer and the defect number of the contact surface between the gate insulation layer and the active layer can be reduced, accumulation of carriers (positrons) inside the gate insulation layer and on the contact surface between the gate insulation layer and the active layer can thus be reduced, thin film transistor threshold voltage offset phenomena can be effectively reduced, and the defect rate of the thin film transistors is reduced.
Owner:BOE TECH GRP CO LTD

Pharmaceutical combination for preventing birth-defect and improving memory

A medicine composition used for preventing and treating birth defect and improving memory consists of atractylodes, radix polygoni multiflori preparata, compound Vitamin B and trace elements, including zinc, selenium, ferrite, chromium, copper, molybdenum, iodine and manganese. The medicine composition is applicable to pregestational women, pregnant women and lactating mothers and has good effect on birth defect prevention and memory improvement. In addition, the medicine composition has the function of health care and benefit and does not cause any adverse effect after long term administration.
Owner:BEIJING GUANWUZHOU BIOSCIENCE INSTITUTION (CN)

Medicine composition for preventing birth defect and improving memory

A medicine composite is used for preventing birth defect and improving memory, which comprises atractylodes ovata, radix rehmanniae preparata, Vitamin B compound, Vitamin E and trace elements, including zinc, selenium, ferrum, chromium, copper, molybdenum and manganese. The medicine composite is applicable for pregestational women, pregnant women and wet nurse and has good effect on birth defect prevention and memory improvement. In addition, the medicine composite has the functions of health care and benefit without causing any toxicity or side effect after being used for a long term.
Owner:BEIJING GUANWUZHOU BIOSCIENCE INSTITUTION (CN)

Circuit Width Thinning Defect Prevention Device and Method

ActiveCN103917051BPrevent width narrowing defectPrevent Thinning DefectsMaterial analysis by optical meansUsing optical meansEtchingDesign information
The present invention relates to a circuit width thinning defect prevention device and a method of preventing a circuit width thinning defect, and can prevent a circuit width thinning defect, that is, a reduction in circuit width due to excessive etching on a specific portion by including a storage means for storing dam design information classified according to the type of a weak portion; an analysis means for analyzing first design information to deduce the type and position of the weak portion; a matching means for extracting the dam design information corresponding to the type of the weak portion from the dam design information stored in the storage means; and a change means for changing the first design information to add a dam according to the dam design information extracted by the matching means to the position of the weak portion deduced by the analysis means.
Owner:SAMSUNG ELECTRO MECHANICS CO LTD

Thin film transistor and preparation method thereof, array substrate, display device

The invention discloses a thin film transistor, a manufacturing method thereof, an array substrate and a display device, which belongs to the technical field of thin film transistors. The thin film transistor comprises a substrate, a gate electrode, a gate insulation layer and an active layer. The gate insulation layer comprises an inner defect prevention layer and an interface defect prevention layer, wherein the inner defect prevention layer is located between the interface defect prevention layer and the gate electrode; the inner defect prevention layer is used for reducing inner defects of the gate insulation layer; and the interface defect prevention layer is used for reducing defects of a contact interface between the gate insulation layer and the active layer. Through arranging the gate insulation layer in the above mode, the defect number of the inner part of the gate insulation layer and the defect number of the contact surface between the gate insulation layer and the active layer can be reduced, accumulation of carriers (positrons) inside the gate insulation layer and on the contact surface between the gate insulation layer and the active layer can thus be reduced, thin film transistor threshold voltage offset phenomena can be effectively reduced, and the defect rate of the thin film transistors is reduced.
Owner:BOE TECH GRP CO LTD

A control method and application of anti-tower defect of asymmetrical side guide plate of coiler

ActiveCN104001754BTower Defect ReductionImprove rolling qualityWinding machineNon symmetric
The invention relates to an anti-tower shaped defect control method for a coiler's asymmetric side guide plate. The method includes: deflecting the transfer rollers of a coiler's transfer roller group, keeping the opening of a driving side guide plate at the level of strip steel width / 2 and the opening of a work side guide plate in the range of strip steel width / 2+60mm-strip steel width / 2+100mm, making a roll table rotate to push the strip steel forward and generate a divergent pushing force simultaneously so as to make the strip steel operate closely to the driving side guide plate, when the strip steel head completely enter the side plates, letting the work side guide plate quickly draw close to the driving side guide plate to realize close, and keeping the driving side guide plate still till the strip steel head is bitten into a subsequent pinch roll group. The method provided by the invention can reduce tower shaped defects of the strip steel, improve coil quality, has no need for recoiling and repair, and saves manpower and material resources. And the method has small investment in equipment hardware transformation, only needs to make angular adjustment on part of the roll table, and other improvements can be achieved by modifying software. Thus, the method is suitable to the field of preventing steel coil tower shaped defects by coilers in various steel production.
Owner:BAOSHAN IRON & STEEL CO LTD

Device for preventing medium around underground pipeline from collapsing

The invention relates to a device for preventing a medium around an underground pipeline from collapsing, and belongs to the technical field of underground pipeline defect prevention, and diagnosis and treatment. The device mainly comprises a fixing chain, fixing supports, geotechnical cloth, a reverse filter layer and lock catches, wherein the fixing supports are located on the inner side of thefixing chain and are connected with the fixing chain, the reverse filter layer wrapped in the geotechnical cloth is arranged between the fixing supports, and the lock catches are arranged at the two ends of the fixing chain. The device for preventing the medium around the underground pipeline from collapsing is installed on the periphery of the underground pipeline, the geotechnical cloth and thereverse filter layer are arranged on the device, so that when a leakage point occurs in the pipeline, only water is allowed to flow back and forth around the pipeline, and solid particles are prevented from being lost. According to the device, when the leakage point and water leakage of the underground pipeline occur, surrounding soil bodies and other media are guaranteed not to be lost along withflowing of the water, so that the device plays an essential role in protection of the underground pipeline and a road, a bridge and a building above the pipeline.
Owner:CENT RES INST OF BUILDING & CONSTR CO LTD MCC GRP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products