43results about How to "Suppression of Reliability Decrease" patented technology

A semiconductor memory device has a plurality of core chips and an interface chip, whose specification can be easily changed, while suppressing the degradation of its reliability. The device has an interposer chip. First internal electrodes connected to core chips are formed on the first surface of the interposer chip. Second internal electrodes connected to an interface chip and third internal electrodes connected to external electrodes are formed on the second surface of the interposer chip. The interface chip can be mounted on the second surface of the interposer chip whenever desired. Therefore, the memory device can have any specification desirable to a customer, only if an appropriate interface chip is mounted on the interposer chip, as is demanded by the customer. Thus, the core chips do not need to be stocked in great quantities in the form of bare chips.

A virtual machine system managed by a current host OS virtually operating on hardware is provided that activates a spare host OS by copying the current host OS to a prescribed memory device using a live migration function when the current host OS is activated, notifies the spare host OS of a request issued to the current host OS via a virtual machine monitor, changes a state of the spare host OS, and switches an OS for managing the virtual machine system from the current host OS to the spare host OS, when the current host OS is in an erroneous state.

A semiconductor memory device has a plurality of core chips and an interface chip, whose specification can be easily changed, while suppressing the degradation of its reliability. The device has an interposer chip. First internal electrodes connected to core chips are formed on the first surface of the interposer chip. Second internal electrodes connected to an interface chip and third internal electrodes connected to external electrodes are formed on the second surface of the interposer chip. The interface chip can be mounted on the second surface of the interposer chip whenever desired. Therefore, the memory device can have any specification desirable to a customer, only if an appropriate interface chip is mounted on the interposer chip, as is demanded by the customer. Thus, the core chips do not need to be stocked in great quantities in the form of bare chips.

A laminated semiconductor package includes: a first package having: an insulating layer; a first semiconductor chip embedded in the insulating layer; a wiring connected to the first semiconductor chip; a first connecting section which is formed on a first face side of the insulating layer and connected to the wiring; and a second connecting section which is formed on a second face side of the insulating layer and connected to the wiring, the second face side being opposite to the first face side; and a second package having: a second semiconductor chip; and a third connecting section connected to the second semiconductor chip. In the laminated semiconductor chip, the first package and the second package are laminated one on the other, and the second connecting section and the third connecting section are connected to each other.

The present invention provides a liquid crystal panel and a liquid crystal display device allowing reliability deterioration due to external pressure to be suppressed without yield rate degradation. The liquid crystal panel includes: a pair of substrates facing each other with a space in between; a liquid crystal layer disposed in the space between the pair of substrates; and a plurality of pairs of pillar structures, each pair of pillar structures being arranged on opposing faces of the pair of substrates, respectively, to face each other along a normal to the opposing faces.

A steering control device capable of suppressing a reduction in reliability even in the case where the redundancy of the power source is increased is provided. A steering ECU includes two control systems in which different external power sources are connected to two drive circuits. The low potential sides of the drive circuits and the low potential sides of the corresponding external power sources are independently connected to each other via power source ground lines for the two control systems. The low potential sides of the drive circuits are connected to each other via an internal ground. Two current detection circuits are provided between the power source ground lines and the internal ground to detect power source ground current values, respectively. The steering ECU includes microcomputers that detect a ground abnormality on the basis of the results of detection performed by the current detection circuits.

A positive electrode active material for a secondary cell containing a spinel lithium manganese composite oxide expressed by general formula (I) below. Lia(MxMn2-x-y-zYyAz)(O4-wZw) (where 0.5<=x<=1.2, 0<=y, 0<=z, x+y+z<2, 0<=a<=1.2, 0<=w<=1, M includes at least Co and may include, other than Co, at least one selected from the group consisting of Ni, Fe, Cr, and Cu, Y is at least one selected from the group consisting of Li, Be, B, Na, Mg, Al, K, and Ca, A is at least one of Ti and Si, and Z is at least one of F and Cl). When this positive electrode for a secondary cell is used for a positive electrode of a secondary cell, the degradations of reliability such as the degradation of capacity due to cycle and the degradation of the crystal structure due to high temperature can be suppressed, thereby realizing a high operating voltage.

A laminated semiconductor package includes: a first package having: an insulating layer; a first semiconductor chip embedded in the insulating layer; a wiring connected to the first semiconductor chip; a first connecting section which is formed on a first face side of the insulating layer and connected to the wiring; and a second connecting section which is formed on a second face side of the insulating layer and connected to the wiring, the second face side being opposite to the first face side; and a second package having: a second semiconductor chip; and a third connecting section connected to the second semiconductor chip. In the laminated semiconductor chip, the first package and the second package are laminated one on the other, and the second connecting section and the third connecting section are connected to each other.

The invention aims at providing a compressor and a method for manufacturing the compressor for inhibiting cost increase and reliability reduction. A compressor comprises: a sealed container; a compression element provided within the sealed container and compressing a refrigerant; an electric motor element provided within the sealed container and driving the compression element; a joint pipe consisting of iron, the joint pipe having one end connected to the sealed container; a suction connection pipe consisting of iron, the suction connection pipe being inserted in the joint pipe and having one end connected to the compression element; and a suction pipe having one end connected to the other end of the suction connection pipe. The suction connection pipe has an annular first protrusion formed on the other end thereof and protruding from the inner peripheral side to the outer peripheral side. In the suction connection pipe and the joint pipe, the first protrusion of the suction connection pipe and the other end of the joint pipe are joined.

When a gas turbine is operated with inlet guide vanes (IGVs) closed during part load operation or the like, the degradation of aerodynamic performance and of reliability may potentially occur since the load on rear stage side vanes of a compressor increases. An object of the present invention is to suppress the degradation of the aerodynamic performance and of reliability of an axial compressor.The axial compressor includes a rotor; a plurality of rotor blade rows installed on the rotor; a casing located outside of the rotor blade rows; a plurality of stator vane rows installed on the casing; and exit guide vanes installed on the downstream side of a final stage stator vane row among the stator vane rows. An incidence angle of a flow toward the final stage stator vane row is equal to or below a limit line of an incidence operating range.

A scroll compressor of the present invention comprises: a main housing having a suction port for sucking a refrigerant from the outside; a driving unit provided inside the main housing for generating rotational power; a scroll compression unit comprising a rotational scroll rotated by a rotational power transmitted through the driving unit and having a spiral rotational wrap, and a fixing scroll coupled with the main housing so as to have a fixed location and including a spiral fixing wrap to be engaged with the spiral rotational wrap; and an outlet housing coupled with the main housing and having an inlet port for receiving the high-pressure refrigerant compressed at the scroll compression unit, and an outlet port for discharging the refrigerant received through the inlet port. The outlet housing comprises: an outlet path spirally formed from an inlet and connected to the outlet port formed on an outer circumference of the outside thereof; a connective path formed along the circumferential direction corresponding to the path direction of the outlet path and connected to the outlet path; and a resonance chamber connected to the outlet path through the connective path, and having an expanded volume in comparison with the volume of the connective path so as to reduce noise and pulsation of the refrigerant discharged from the scroll compression unit.

A chip element in the form of a substantially rectangular parallelepiped having end surfaces and side surfaces is formed (step of forming chip element). An electrically conductive green sheet is formed (step of forming electrically conductive green sheet). An electrically conductive paste is applied to the end surfaces of the chip element (step of application electrically conductive paste). A chip element is formed in which the electrically conductive green sheet is attached to the end surface via the electrically conductive paste applied to the end surface of the chip element (step of attaching electrically conductive sheet). In the step of attaching, the end surface of the electrically conductive green sheet on the side of the side surfaces is positioned on the outside of the side surfaces, and the electrically conductive paste applied to the end surface is pressed out into a space between the electrically conductive green sheet and ridge portions.

The invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes a first semiconductor electronic component which includes a pad electrode, a solder bump, and a metal layer between a pad and solder that is configured to have an underlying metal layer formed between the pad electrode and the solder bump and connected to the pad electrode, and a main metal layer formed on the underlying metal layer, and in which the main metal layer has an eave portion at an outer edge portion thereof. Accordingly, the invention prevents the reduction in the reliability of electrical connection and mechanical connection between the semiconductor electronic components while suppressing a decrease in the mass production rate and an increase in the cost.

In a manufacturing method for a semiconductor device provided with a MONOS-type FET for a non-volatile memory and high-voltage and low-voltage MOSFETs, a groove having a predetermined depth is formed in a region in which the high-voltage MOSFET on a semiconductor substrate is formed, and an oxide film serving as a gate insulating film of the high-voltage MOSFET is formed within the formed groove by thermal oxidation. Thereafter, a gate electrode film of the low-voltage MOSFET is formed on the entire surface of the semiconductor substrate. Thereafter, a region for the MONOS-type FET is opened, the semiconductor surface of the semiconductor substrate is exposed, and a first potential barrier film, a charge storage film, and a second potential barrier film are sequentially deposited, to thereby form a charge storage three-layer film. Agate electrode film of the MONOS-type FET is formed on the formed charge storage three-layer film.

A chip element in the form of a substantially rectangular parallelepiped having end surfaces and side surfaces is formed (step of forming chip element). An electrically conductive green sheet is formed (step of forming electrically conductive green sheet). An electrically conductive paste is applied to the end surfaces of the chip element (step of application electrically conductive paste). A chip element is formed in which the electrically conductive green sheet is attached to the end surface via the electrically conductive paste applied to the end surface of the chip element (step of attaching electrically conductive sheet). In the step of attaching, the end surface of the electrically conductive green sheet on the side of the side surfaces is positioned on the outside of the side surfaces, and the electrically conductive paste applied to the end surface is pressed out into a space between the electrically conductive green sheet and ridge portions.

An electronic component includes a substrate; a functional part that is formed beneath at least one of a front face and a bottom face of the substrate and that performs a predetermined function; a plurality of terminals that is formed on the front face or the bottom face of the substrate and that is connected to the functional part; a plurality of outer electrodes formed on the front face and the bottom face of the substrate; and interconnection lines, formed on the front face and the bottom face of the substrate, for connecting the terminals on the front face or the bottom face of the substrate to the outer electrodes.

An electronic component including a substrate, a capacitor lower electrode disposed on the substrate, an inorganic dielectric layer disposed on the substrate to cover the lower electrode, a capacitor upper electrode disposed directly on the inorganic dielectric layer and facing the lower electrode via the inorganic dielectric layer, and a coil electrically connected to the lower electrode or the upper electrode. The upper surface of the inorganic dielectric layer is flat.

According to one embodiment, a manufacturing method of a semiconductor device comprises forming a to-be-processed film includes a convex potion and concave potion on its surface on a semiconductor substrate via layers having a relative dielectric constant smaller than that of SiO2, planarizing the surface of the to-be-processed film, and etching the planarized surface of the to-be-processed film.

A manufacturing method for a battery including a cell array and a case is provided. The cell array includes a plurality of single cells arranged in a certain direction. The case includes a pair of compartment members of which a longitudinal direction is a direction in which the single cells are arranged, and a first end member provided at a first end in the longitudinal direction. In the manufacturing method, in space surrounded by the compartment members and the first end member, the cell array and a second end member facing the first end member across the cell array are placed. In a direction to compress the cell array from an outside part of the second end member, each compartment member is joined with the second end member at a second end in the longitudinal direction while a predetermined load is applied to bind the cell array.

A method for manufacturing an organic electronic device in which a sealing member 19 having a sealing substrate 15, an adhesive part 13 which exhibits adhesiveness and which is provided on the sealingsubstrate 15, and a hygroscopic part 11 which is a hygroscopic cured product provided on the adhesive part 13, are affixed to an organic electronic element 17.

The scroll compressor of the present invention includes: a main casing having a suction port for sucking refrigerant from the outside; a driving unit provided inside the main casing for generating rotational power; a scroll compression unit including an orbiting scroll and a fixed scroll, the orbiting scroll is rotated by rotational power transmitted via the drive unit and has helical rotating teeth, the The fixed scroll is engaged with the main housing to have a fixed position and includes helical fixed teeth that engage with helical rotating teeth; and a discharge housing that is engaged with the main housing and has a An inlet for receiving high-pressure refrigerant compressed in the scroll compression unit and a discharge port for discharging refrigerant received through the inlet. The discharge housing includes: a discharge passage formed spirally from the inlet and connected to an outlet formed on an outer circumference thereof outside; a communication passage along a direction connected to the discharge passage and a resonant cavity that is connected with the discharge channel through the communication channel and has an enlarged volume compared with the volume of the communication channel to reduce from Noise and pulsation of refrigerant discharged in the scroll compression unit.

This air conditioning device (100) is provided with a unit casing (40), an outdoor heat exchanger (15) contained within the unit casing (40), and a plate member (80). The unit casing (40) has formed therein a blower compartment (SP1) and a machine compartment (SP2). The outdoor heat exchanger (15) has: a heat exchange section (50) which includes a plurality of heat transfer pipes (60) through which a refrigerant flows, is disposed in the blower compartment (SP1), and exchanges heat between the refrigerant and an outdoor air flow (AF); and a header collecting pipe (70) connected to the heat transfer pipes (60) and disposed in the machine compartment (SP2). The header collecting pipe (70) includes a header body (75). The plate member (80) includes a front surface (811) for shielding the machine compartment (SP2) from the outdoor air flow (AF). The plate member (80) is affixed to the header collecting pipe (70) and is also affixed to the unit casing (40) or a partition plate (46) disposedin the unit casing (40).

Provided is an outdoor unit of a refrigeration device in which deterioration of reliability in relation to cooling of a heat-generating component using a heat pipe is suppressed. An outdoor unit (10)includes an outdoor fan (18) for generating an outdoor airflow (AF), an outdoor unit casing (40), a high-heat-generating electrical component (65), a compressor control board (76) on which the high-heat-generating electrical component (65) is mounted, an electrical component box (50) for housing the compressor control board (76), and a first cooling unit (80) for cooling the high-heat-generating electrical component (65). The first cooling unit (80) has a heat pipe (83), a plurality of first cooling unit fins (81) disposed on a flow path of the outdoor airflow (AF), and a first cooling unit main body part (82) interposed between the heat pipe (83) and the first cooling unit fins (81) and thermally connecting the heat pipe (83) and the first cooling unit fins (81). The heat pipe (83) is located in the electrical component box (50) and positioned adjacent to the high-heat-generating electrical component (65).

The present disclosure relates to a thin film transistor substrate and a display device including the same. An exemplary embodiment of the present disclosure provides a thin film transistor including an oxide semiconductor layer on a substrate; a gate insulating layer on the oxide semiconductor layer; a gate electrode on the gate insulating layer at least partially overlapping the oxide semiconductor layer; an interlayer insulating layer on the gate electrode; and a source electrode and a drain electrode on the interlayer insulating layer. The oxide semiconductor layer includes a channel portion overlapping the gate electrode and a connection portion at least partially not overlapping the gate electrode, the source electrode and the drain electrode are in contact with the connection portion of the oxide semiconductor layer, the interlayer insulating layer is in contact with the connection portion of the oxide semiconductor layer, a hydrogen concentration of the connection portion is higher than a hydrogen concentration of the channel portion, and a hydrogen concentration of the interlayer insulating layer is lower than a hydrogen concentration of the channel portion. And the interlayer insulating layer, the source electrode, and the drain electrode are in contact with the connection portion.