The invention provides an FPGA based IPv6 data packet high-speed
processing device and an operational method thereof, and belongs to the technical field of transceiving
processing of the data packet. The device comprises a
microprocessor interface module, an IPv6 data packet encapsulating transmission module, an IPv6 data packet decapsulation analysis module, an
Ethernet MAC controller module, an SRAM controller module and a user interactive module, wherein the
microprocessor interface module is connected with an external
microprocessor, the IPv6 data packet encapsulating transmission module, the IPv6 data packet decapsulation analysis module, the SRAM controller module and the user interactive module respectively; and the IPv6 data packet encapsulating transmission module and the IPv6 data packet decapsulation analysis module are connected with the
Ethernet MAC controller module respectively. The device has the advantages that: the IPv6 is fully supported, the
speed of processing the
network data is greatly improved, the modularization design is adopted, and various microprocessors or
bus interfaces are adapted only by modifying the microprocessor interface module, so that the device is high in expansibility, versatility and flexibility.