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Device for breaking through nonvolatile semiconductor memory member speed bottle-neck

A non-volatile storage and device technology, applied in memory systems, instruments, memory address/allocation/relocation, etc., can solve problems such as the incompatibility of the real processing capabilities of microprocessor units, avoiding complex mechanisms and solving speed Bottleneck, complexity reduction effect

Inactive Publication Date: 2008-01-02
NATIONZ TECH INC
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  • Abstract
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Problems solved by technology

These smart card chips generally can only run within 20MHz; or use a multi-instruction cycle MCU core to achieve a higher main frequency, but the real processing capability of the microprocessor unit cannot match the main frequency

Method used

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  • Device for breaking through nonvolatile semiconductor memory member speed bottle-neck

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Embodiment Construction

[0022] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0023] The access bus bandwidth of non-volatile memory devices depends on: access bus frequency × access bus bit width, while the read instruction bandwidth of the microprocessor CPU depends on: instruction frequency × instruction bit width; if the microprocessor CPU instruction frequency is much greater than When the non-volatile memory device accesses the bus frequency, the non-volatile memory device can be improved only by increasing the non-volatile memory device access bus bit width without changing the access bus frequency, instruction frequency and instruction bit width. Access the bus bandwidth, so as to achieve the purpose of matching the instruction bandwidth of the microprocessor CPU.

[0024] First expand the bit width of the access bus of the non-volatile memory device, so that the bit width is several times (for example,...

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Abstract

A kind of device to breach the speed bottleneck of non-volatile memory is disclosed, which includes buffering device, instruction bus and the access bus of non-volatile memory; the buffering device is mounted between the CPU the non-volatile memory, the buffering device and microprocessor CPU are connected by instruction bus, the buffering device and the non-volatile memory are connected by the access bus of non-volatile memory to expand the bit width of access bus of non-volatile memory connected with buffering device; the instruction bus includes state bus, information bus of instruction address and instruction code bus; the access bus of non-volatile memory includes address bus of non-volatile memory and data bus of non-volatile memory; the buffering device includes buffering controller and buffering unit, and the buffering unit can be controlled by buffering controller via control bus.

Description

technical field [0001] The invention relates to the field of integrated circuit (IC, Integrated Chip) design, in particular to a device for breaking through the speed bottleneck of a nonvolatile storage device. Background technique [0002] With the development of semiconductor technology, the delay of logic devices is getting smaller and smaller, so that the operating speed of functional units composed of logic circuits such as microprocessor CPU can be faster and faster; some non-volatile memory devices, such as Flash or Units such as EEPROM are not composed of logic devices, but their access speed cannot be improved synchronously. The current technical situation is that most of the system-on-chip SOC (System On Chip) chips need to use non-volatile memory to store the execution code or data, so that the access speed of the non-volatile memory device cannot match the microprocessor The operating speed of the non-volatile memory device is too slow, and the processing capabi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40G06F12/08G06F12/0831G06F12/0877
Inventor 余运波谢华刘军彭波
Owner NATIONZ TECH INC
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